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Date: Fri, 18 Nov 2016 09:49:34 +0100 (CET)
From: Thomas Gleixner <tglx@linutronix.de>
To: Ingo Molnar <mingo@kernel.org>
cc: Kyle Huey <me@kylehuey.com>,
        "Robert O'Callahan" <robert@ocallahan.org>,
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Subject: Re: [PATCH v12 6/7] x86/arch_prctl: Add ARCH_[GET|SET]_CPUID
In-Reply-To: <20161118081444.GC15912@gmail.com>
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References: <20161117020610.5302-1-khuey@kylehuey.com> <20161117020610.5302-7-khuey@kylehuey.com> <20161118081444.GC15912@gmail.com>
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On Fri, 18 Nov 2016, Ingo Molnar wrote:
> * Kyle Huey <me@kylehuey.com> wrote:
> > +	if (test_tsk_thread_flag(prev_p, TIF_NOCPUID) ^
> > +	    test_tsk_thread_flag(next_p, TIF_NOCPUID)) {
> > +		set_cpuid_faulting(test_tsk_thread_flag(next_p, TIF_NOCPUID));
> > +	}
> > +
> 
> Why not cache the required MSR value in the task struct instead?
> 
> That would allow something much more obvious and much faster, like:
> 
> 	if (prev_p->thread.misc_features_val != next_p->thread.misc_features_val)
> 		wrmsrl(MSR_MISC_FEATURES_ENABLES, next_p->thread.misc_features_val);
> 
> (The TIF flag maintenance is still required to get into __switch_to_xtra().)
> 
> It would also be easy to extend without extra overhead, should any other feature 
> bit be added to the MSR in the future.

I doubt that. There are feature enable bits coming up which are not related
to tasks. So if we have switches enabling/disabling global features, then
we would be forced to chase all threads in order to update all misc_features
thread variables. Surely not what we want to do.

Thanks,

	tglx