Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753911AbcKRXWe (ORCPT ); Fri, 18 Nov 2016 18:22:34 -0500 Received: from mail-it0-f67.google.com ([209.85.214.67]:35873 "EHLO mail-it0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753757AbcKRXV1 (ORCPT ); Fri, 18 Nov 2016 18:21:27 -0500 From: Walt Feasel To: lidza.louina@gmail.com Cc: markh@compro.net, gregkh@linuxfoundation.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org, Walt Feasel Subject: [PATCH 1/2] staging: dgnc: dgnc_neo.h Comment style modifications Date: Fri, 18 Nov 2016 18:21:08 -0500 Message-Id: <1479511269-25834-2-git-send-email-waltfeasel@gmail.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1479511269-25834-1-git-send-email-waltfeasel@gmail.com> References: <1479511269-25834-1-git-send-email-waltfeasel@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1933 Lines: 59 Make modifications for comment style Signed-off-by: Walt Feasel --- drivers/staging/dgnc/dgnc_neo.h | 24 +++++++++++------------- 1 file changed, 11 insertions(+), 13 deletions(-) diff --git a/drivers/staging/dgnc/dgnc_neo.h b/drivers/staging/dgnc/dgnc_neo.h index 97f0386..1aa9325 100644 --- a/drivers/staging/dgnc/dgnc_neo.h +++ b/drivers/staging/dgnc/dgnc_neo.h @@ -18,14 +18,13 @@ #include "dgnc_driver.h" -/************************************************************************ - * Per channel/port NEO UART structure * - ************************************************************************ - * Base Structure Entries Usage Meanings to Host * - * * - * W = read write R = read only * - * U = Unused. * - ************************************************************************/ +/* + * Per channel/port NEO UART structure + * Base Structure Entries Usage Meanings to Host + * + * W = read write R = read only + * U = Unused. + */ struct neo_uart_struct { u8 txrx; /* WR RHR/THR - Holding Reg */ @@ -48,9 +47,9 @@ struct neo_uart_struct { u8 xonchar2; /* WR XON 2 - XOn Character 2 Reg */ u8 reserved1[0x2ff - 0x200]; /* U Reserved by Exar */ - u8 txrxburst[64]; /* RW 64 bytes of RX/TX FIFO Data */ + u8 txrxburst[64]; /* RW 64 bytes of RX/TX FIFO Data */ u8 reserved2[0x37f - 0x340]; /* U Reserved by Exar */ - u8 rxburst_with_errors[64]; /* R 64 bytes of RX FIFO Data + LSR */ + u8 rxburst_with_errors[64]; /* R 64 bytes of RX FIFO Data + LSR */ }; /* Where to read the extended interrupt register (32bits instead of 8bits) */ @@ -152,9 +151,8 @@ struct neo_uart_struct { #define UART_17158_IER_RTSDTR 0x40 /* Output Interrupt Enable */ #define UART_17158_IER_CTSDSR 0x80 /* Input Interrupt Enable */ -/* - * Our Global Variables - */ +/* Our Global Variables */ + extern struct board_ops dgnc_neo_ops; #endif -- 2.1.4