Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932248AbcKUGKv (ORCPT ); Mon, 21 Nov 2016 01:10:51 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:54151 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932221AbcKUGKt (ORCPT ); Mon, 21 Nov 2016 01:10:49 -0500 From: Hemant Kumar To: linuxppc-dev@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org, benh@kernel.crashing.org, mpe@ellerman.id.au, stewart@linux.vnet.ibm.com, dja@axtens.net, mikey@neuling.org, maddy@linux.vnet.ibm.com, paulus@samba.org, anton@samba.org, sukadev@linux.vnet.ibm.com, eranian@google.com, Hemant Kumar Subject: [PATCH v2 6/6] powerpc/perf: IMA pmu cpumask and cpu hotplug support Date: Mon, 21 Nov 2016 11:40:05 +0530 X-Mailer: git-send-email 2.7.4 In-Reply-To: <1479708605-10238-1-git-send-email-hemant@linux.vnet.ibm.com> References: <1479708605-10238-1-git-send-email-hemant@linux.vnet.ibm.com> X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16112106-1617-0000-0000-00000180237D X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 16112106-1618-0000-0000-0000473177A0 Message-Id: <1479708605-10238-7-git-send-email-hemant@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2016-11-21_03:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=3 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1609300000 definitions=main-1611210112 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 8049 Lines: 268 Adds cpumask attribute to be used by each IMA pmu. Only one cpu (any online CPU) from each chip for nest PMUs is designated to read counters. On CPU hotplug, dying CPU is checked to see whether it is one of the designated cpus, if yes, next online cpu from the same chip (for nest units) is designated as new cpu to read counters. Cc: Madhavan Srinivasan Cc: Michael Ellerman Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Cc: Anton Blanchard Cc: Sukadev Bhattiprolu Cc: Michael Neuling Cc: Stewart Smith Cc: Stephane Eranian Signed-off-by: Hemant Kumar --- arch/powerpc/include/asm/opal-api.h | 3 +- arch/powerpc/include/asm/opal.h | 2 + arch/powerpc/perf/ima-pmu.c | 167 ++++++++++++++++++++++++- arch/powerpc/platforms/powernv/opal-wrappers.S | 1 + 4 files changed, 171 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/include/asm/opal-api.h b/arch/powerpc/include/asm/opal-api.h index 0e2e57b..116c155 100644 --- a/arch/powerpc/include/asm/opal-api.h +++ b/arch/powerpc/include/asm/opal-api.h @@ -167,7 +167,8 @@ #define OPAL_INT_EOI 124 #define OPAL_INT_SET_MFRR 125 #define OPAL_PCI_TCE_KILL 126 -#define OPAL_LAST 126 +#define OPAL_NEST_IMA_COUNTERS_CONTROL 128 +#define OPAL_LAST 128 /* Device tree flags */ diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h index e958b70..bc31251 100644 --- a/arch/powerpc/include/asm/opal.h +++ b/arch/powerpc/include/asm/opal.h @@ -229,6 +229,8 @@ int64_t opal_pci_tce_kill(uint64_t phb_id, uint32_t kill_type, int64_t opal_rm_pci_tce_kill(uint64_t phb_id, uint32_t kill_type, uint32_t pe_num, uint32_t tce_size, uint64_t dma_addr, uint32_t npages); +int64_t opal_nest_ima_counters_control(uint64_t mode, uint64_t value1, + uint64_t value2, uint64_t value3); /* Internal functions */ extern int early_init_dt_scan_opal(unsigned long node, const char *uname, diff --git a/arch/powerpc/perf/ima-pmu.c b/arch/powerpc/perf/ima-pmu.c index 9948636..2b1bfc1 100644 --- a/arch/powerpc/perf/ima-pmu.c +++ b/arch/powerpc/perf/ima-pmu.c @@ -16,6 +16,7 @@ struct perchip_nest_info nest_perchip_info[IMA_MAX_CHIPS]; struct ima_pmu *per_nest_pmu_arr[IMA_MAX_PMUS]; +static cpumask_t nest_ima_cpumask; /* Needed for sanity check */ extern u64 nest_max_offset; @@ -31,6 +32,164 @@ static struct attribute_group ima_format_group = { .attrs = ima_format_attrs, }; +/* Get the cpumask printed to a buffer "buf" */ +static ssize_t ima_pmu_cpumask_get_attr(struct device *dev, + struct device_attribute *attr, char *buf) +{ + cpumask_t *active_mask; + + active_mask = &nest_ima_cpumask; + return cpumap_print_to_pagebuf(true, buf, active_mask); +} + +static DEVICE_ATTR(cpumask, S_IRUGO, ima_pmu_cpumask_get_attr, NULL); + +static struct attribute *ima_pmu_cpumask_attrs[] = { + &dev_attr_cpumask.attr, + NULL, +}; + +static struct attribute_group ima_pmu_cpumask_attr_group = { + .attrs = ima_pmu_cpumask_attrs, +}; + +/* + * nest_init : Initializes the nest ima engine for the current chip. + */ +static void nest_init(int *loc) +{ + int rc; + + rc = opal_nest_ima_counters_control(NEST_IMA_PRODUCTION_MODE, + NEST_IMA_ENGINE_START, 0, 0); + if (rc) + loc[smp_processor_id()] = 1; +} + +static void nest_change_cpu_context(int old_cpu, int new_cpu) +{ + int i; + + for (i = 0; + (per_nest_pmu_arr[i] != NULL) && (i < IMA_MAX_PMUS); i++) + perf_pmu_migrate_context(&per_nest_pmu_arr[i]->pmu, + old_cpu, new_cpu); +} + +static int ppc_nest_ima_cpu_online(unsigned int cpu) +{ + int nid, fcpu, ncpu; + struct cpumask *l_cpumask, tmp_mask; + + /* Fint the cpumask of this node */ + nid = cpu_to_node(cpu); + l_cpumask = cpumask_of_node(nid); + + /* + * If any of the cpu from this node is already present in the mask, + * just return, if not, then set this cpu in the mask. + */ + if (!cpumask_and(&tmp_mask, l_cpumask, &nest_ima_cpumask)) { + cpumask_set_cpu(cpu, &nest_ima_cpumask); + return 0; + } + + fcpu = cpumask_first(l_cpumask); + ncpu = cpumask_next(cpu, l_cpumask); + if (cpu == fcpu) { + if (cpumask_test_and_clear_cpu(ncpu, &nest_ima_cpumask)) { + cpumask_set_cpu(cpu, &nest_ima_cpumask); + nest_change_cpu_context(ncpu, cpu); + } + } + + return 0; +} + +static int ppc_nest_ima_cpu_offline(unsigned int cpu) +{ + int nid, target = -1; + struct cpumask *l_cpumask; + + /* + * Check in the designated list for this cpu. Dont bother + * if not one of them. + */ + if (!cpumask_test_and_clear_cpu(cpu, &nest_ima_cpumask)) + return 0; + + /* + * Now that this cpu is one of the designated, + * find a next cpu a) which is online and b) in same chip. + */ + nid = cpu_to_node(cpu); + l_cpumask = cpumask_of_node(nid); + target = cpumask_next(cpu, l_cpumask); + + /* + * Update the cpumask with the target cpu and + * migrate the context if needed + */ + if (target >= 0 && target <= nr_cpu_ids) { + cpumask_set_cpu(target, &nest_ima_cpumask); + nest_change_cpu_context(cpu, target); + } + return 0; +} + +static int nest_pmu_cpumask_init(void) +{ + const struct cpumask *l_cpumask; + int cpu, nid; + int *cpus_opal_rc; + + if (!cpumask_empty(&nest_ima_cpumask)) + return 0; + + cpu_notifier_register_begin(); + + /* + * Nest PMUs are per-chip counters. So designate a cpu + * from each chip for counter collection. + */ + for_each_online_node(nid) { + l_cpumask = cpumask_of_node(nid); + + /* designate first online cpu in this node */ + cpu = cpumask_first(l_cpumask); + cpumask_set_cpu(cpu, &nest_ima_cpumask); + } + + /* + * Memory for OPAL call return value. + */ + cpus_opal_rc = kzalloc((sizeof(int) * nr_cpu_ids), GFP_KERNEL); + if (!cpus_opal_rc) + goto fail; + + /* Initialize Nest PMUs in each node using designated cpus */ + on_each_cpu_mask(&nest_ima_cpumask, (smp_call_func_t)nest_init, + (void *)cpus_opal_rc, 1); + + /* Check return value array for any OPAL call failure */ + for_each_cpu(cpu, &nest_ima_cpumask) { + if (cpus_opal_rc[cpu]) + goto fail; + } + + cpuhp_setup_state(CPUHP_AP_PERF_ONLINE, + "POWER_NEST_IMA_ONLINE", + ppc_nest_ima_cpu_online, + ppc_nest_ima_cpu_offline); + + cpu_notifier_register_done(); + return 0; + +fail: + cpu_notifier_register_done(); + return -ENODEV; +} + static int nest_ima_event_init(struct perf_event *event) { int chip_id; @@ -63,7 +222,7 @@ static int nest_ima_event_init(struct perf_event *event) chip_id = topology_physical_package_id(event->cpu); pcni = &nest_perchip_info[chip_id]; event->hw.event_base = pcni->vbase[config/PAGE_SIZE] + - (config & ~PAGE_MASK); + (config & ~PAGE_MASK); return 0; } @@ -123,6 +282,7 @@ static int update_pmu_ops(struct ima_pmu *pmu) pmu->pmu.stop = ima_event_stop; pmu->pmu.read = ima_perf_event_update; pmu->attr_groups[1] = &ima_format_group; + pmu->attr_groups[2] = &ima_pmu_cpumask_attr_group; pmu->pmu.attr_groups = pmu->attr_groups; return 0; @@ -190,6 +350,11 @@ int init_ima_pmu(struct ima_events *events, int idx, { int ret = -ENODEV; + /* Add cpumask and register for hotplug notification */ + ret = nest_pmu_cpumask_init(); + if (ret) + return ret; + ret = update_events_in_group(events, idx, pmu_ptr); if (ret) goto err_free; diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S index 44d2d84..0e541ca 100644 --- a/arch/powerpc/platforms/powernv/opal-wrappers.S +++ b/arch/powerpc/platforms/powernv/opal-wrappers.S @@ -309,3 +309,4 @@ OPAL_CALL(opal_int_eoi, OPAL_INT_EOI); OPAL_CALL(opal_int_set_mfrr, OPAL_INT_SET_MFRR); OPAL_CALL(opal_pci_tce_kill, OPAL_PCI_TCE_KILL); OPAL_CALL_REAL(opal_rm_pci_tce_kill, OPAL_PCI_TCE_KILL); +OPAL_CALL(opal_nest_ima_counters_control, OPAL_NEST_IMA_COUNTERS_CONTROL); -- 2.7.4