Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753982AbcKUSUU (ORCPT ); Mon, 21 Nov 2016 13:20:20 -0500 Received: from mail-oi0-f66.google.com ([209.85.218.66]:33500 "EHLO mail-oi0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752054AbcKUSUT (ORCPT ); Mon, 21 Nov 2016 13:20:19 -0500 MIME-Version: 1.0 In-Reply-To: <6e5a0f8b-31e3-8ed7-62f7-f9f28f73f503@zytor.com> References: <4152ADD4-3F2D-46B2-B545-082C734C7640@zytor.com> <6e5a0f8b-31e3-8ed7-62f7-f9f28f73f503@zytor.com> From: Linus Torvalds Date: Mon, 21 Nov 2016 10:20:17 -0800 X-Google-Sender-Auth: 3-iJX-i238ARi--yTE9883hMYqo Message-ID: Subject: Re: What exactly do 32-bit x86 exceptions push on the stack in the CS slot? To: "H. Peter Anvin" Cc: Andy Lutomirski , tedheadster@gmail.com, Brian Gerst , George Spelvin , "linux-kernel@vger.kernel.org" , X86 ML Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1665 Lines: 36 On Mon, Nov 21, 2016 at 7:58 AM, H. Peter Anvin wrote: > On 11/20/16 20:54, hpa@zytor.com wrote: >> >> I believe i686+ writes zero, older CPUs leave unchanged. > > I should point out that, at least from my memory, the same applies to > instructions like "movl ". I can't even remember for sure how the > behavior differs between "movl ," and "movl ,"; > I'd have to do some digging. I have this distinct feeling that there issues with *both* the register and memory versions. Because I have this dim memory that on early microarchitectures, even "mov segment to register" would always only do a 16-bit move, even if it was encoded as a 32-bit "movl". Although that may be partly because I know "gas" had some confusion about operand sizes and segment register instructions, so there might have been toolchain issues too. I just dug out my old 486 manual on _paper_ (Christ, I still had it): "Intel486(tm) Microprocessor Family Programmer's Reference Manual". The "mov" instruction is only documented for r/m16, and it has a footnote saying "In protected mode, use 16-bit operand size prefix". I definitely know that the "only write 16 bits" was the case for memory accesses, but I think it might have been the case even for register moves. After all, "mov segment register" is actually a completely different instruction from the normal "mov" instructions, even if it often shows up together with them in the instruction descriptions. The i686 cleaned up a lot of things, but I think this might be an area where there were differences between i486 and Pentium and all the clone chips too. Linus