Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934335AbcKVSMd (ORCPT ); Tue, 22 Nov 2016 13:12:33 -0500 Received: from mail-pg0-f46.google.com ([74.125.83.46]:33594 "EHLO mail-pg0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933146AbcKVSMb (ORCPT ); Tue, 22 Nov 2016 13:12:31 -0500 From: Kevin Hilman To: Viresh Kumar Cc: Rob Herring , Rafael Wysocki , linaro-kernel@lists.linaro.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Mark Rutland , Ulf Hansson , Vincent Guittot , Lina Iyer , devicetree@vger.kernel.org, Stephen Boyd , Nayak Rajendra Subject: Re: [PATCH 1/2] PM / Domains: Introduce domain-performance-state binding Organization: BayLibre References: <20161121150708.j4gosfr2uetc7mwp@rob-hp-laptop> <20161122031717.GE10014@vireshk-i7> Date: Tue, 22 Nov 2016 10:12:28 -0800 In-Reply-To: <20161122031717.GE10014@vireshk-i7> (Viresh Kumar's message of "Tue, 22 Nov 2016 08:47:17 +0530") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.5 (darwin) MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3766 Lines: 82 Viresh Kumar writes: > On 21-11-16, 09:07, Rob Herring wrote: >> On Fri, Nov 18, 2016 at 02:53:12PM +0530, Viresh Kumar wrote: >> > Some platforms have the capability to configure the performance state of >> > their Power Domains. The performance levels are represented by positive >> > integer values, a lower value represents lower performance state. >> > >> > The power-domains until now were only concentrating on the idle state >> > management of the device and this needs to change in order to reuse the >> > infrastructure of power domains for active state management. >> > >> > This patch introduces a new optional property for the consumers of the >> > power-domains: domain-performance-state. >> > >> > If the consumers don't need the capability of switching to different >> > domain performance states at runtime, then they can simply define their >> > required domain performance state in their node directly. Otherwise the >> > consumers can define their requirements with help of other >> > infrastructure, for example the OPP table. >> > >> > Signed-off-by: Viresh Kumar >> > --- >> > Documentation/devicetree/bindings/power/power_domain.txt | 6 ++++++ >> > 1 file changed, 6 insertions(+) >> > >> > diff --git a/Documentation/devicetree/bindings/power/power_domain.txt b/Documentation/devicetree/bindings/power/power_domain.txt >> > index e1650364b296..db42eacf8b5c 100644 >> > --- a/Documentation/devicetree/bindings/power/power_domain.txt >> > +++ b/Documentation/devicetree/bindings/power/power_domain.txt >> > @@ -106,6 +106,12 @@ domain provided by the 'parent' power controller. >> > - power-domains : A phandle and PM domain specifier as defined by bindings of >> > the power controller specified by phandle. >> > >> > +Optional properties: >> > +- domain-performance-state: A positive integer value representing the minimum >> > + performance level (of the parent domain) required by the consumer for its >> > + working. The integer value '1' represents the lowest performance level and the >> > + highest value represents the highest performance level. >> >> How does one come up with the range of values? > > Why would we need a range here? The value here represents the minimum 'state' > and the assumption is that everything above that level would be fine. So the > range is automatically: domain-performance-state -> MAX. > >> It seems like you are >> just making up numbers. Couldn't the domain performance level be an OPP >> in the sense that it is a collection of clock frequencies and voltage >> settings? > > The clock is going to be handled by the device itself (at least for the case we > have today) and the performance-state lies with the power-domain which is > configured separately. If the performance level includes both clk and voltage, > then why would we need to show the clock rates in the DT ? Wouldn't a > performance level be enough in such cases? I think the question is: what does the performance-level of a domain actually mean? Or, what are the units? Depending on the SoC, there's probably a few things this could mean. It might mean is that an underlying bus/interconnect can be configured to guarantee a specific bandwidth or throughput. That in turn might mean that that bus/interconnect might have to be set at a specific frequency/voltage. In your case, IIUC, you're just passing some magic value to some firmware running on a micro-controller, but under the hood that uC is probably configuring a frequency/voltage someplace. So, if we're going to have a generic DT binding for this, it needs to be something that's useful on platforms that are not using magic numbers managed by a uC as well. Kevin