Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934025AbcKVWPR (ORCPT ); Tue, 22 Nov 2016 17:15:17 -0500 Received: from mail.kmu-office.ch ([178.209.48.109]:49855 "EHLO mail.kmu-office.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932273AbcKVWPQ (ORCPT ); Tue, 22 Nov 2016 17:15:16 -0500 MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Date: Tue, 22 Nov 2016 14:08:55 -0800 From: Stefan Agner To: Lukasz Majewski Cc: Thierry Reding , Sascha Hauer , Boris Brezillon , linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, Fabio Estevam , Fabio Estevam , Lothar Wassmann , Bhuvanchandra DV , kernel@pengutronix.de Subject: Re: [PATCH v3 11/11] pwm: imx: Add polarity inversion support to i.MX's PWMv2 In-Reply-To: <1477984230-18071-12-git-send-email-l.majewski@majess.pl> References: <1477984230-18071-1-git-send-email-l.majewski@majess.pl> <1477984230-18071-12-git-send-email-l.majewski@majess.pl> Message-ID: User-Agent: Roundcube Webmail/1.1.3 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2361 Lines: 78 On 2016-11-01 00:10, Lukasz Majewski wrote: > With this patch the polarity settings for i.MX's PWMv2 is now supported > on top of atomic PWM setting Nit: Try to use imperative, e.g. "Update the driver to support...." (see also Documentation/SubmittingPatches). I prefer to have the documentation and driver update in one commit so it is obvious that the driver support has been added at the same time the documentation has been updated. -- Stefan > > Signed-off-by: Bhuvanchandra DV > Signed-off-by: Lukasz Majewski > --- > Changes for v3: > - None > > Changes for v2: > - New patch > --- > drivers/pwm/pwm-imx.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c > index b636526..03b01a4 100644 > --- a/drivers/pwm/pwm-imx.c > +++ b/drivers/pwm/pwm-imx.c > @@ -38,6 +38,7 @@ > #define MX3_PWMCR_DOZEEN (1 << 24) > #define MX3_PWMCR_WAITEN (1 << 23) > #define MX3_PWMCR_DBGEN (1 << 22) > +#define MX3_PWMCR_POUTC (1 << 18) > #define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16) > #define MX3_PWMCR_CLKSRC_IPG (1 << 16) > #define MX3_PWMCR_SWR (1 << 3) > @@ -215,6 +216,9 @@ static int imx_pwm_apply_v2(struct pwm_chip *chip, > struct pwm_device *pwm, > if (state->enabled) > cr |= MX3_PWMCR_EN; > > + if (state->polarity == PWM_POLARITY_INVERSED) > + cr |= MX3_PWMCR_POUTC; > + > writel(cr, imx->mmio_base + MX3_PWMCR); > > /* Disable the clock if the PWM is being disabled. */ > @@ -237,6 +241,7 @@ static struct pwm_ops imx_pwm_ops_v2 = { > }; > > struct imx_pwm_data { > + bool polarity_supported; > struct pwm_ops *pwm_ops; > }; > > @@ -245,6 +250,7 @@ static struct imx_pwm_data imx_pwm_data_v1 = { > }; > > static struct imx_pwm_data imx_pwm_data_v2 = { > + .polarity_supported = true, > .pwm_ops = &imx_pwm_ops_v2, > }; > > @@ -285,6 +291,11 @@ static int imx_pwm_probe(struct platform_device *pdev) > imx->chip.base = -1; > imx->chip.npwm = 1; > imx->chip.can_sleep = true; > + if (data->polarity_supported) { > + dev_dbg(&pdev->dev, "PWM supports output inversion\n"); > + imx->chip.of_xlate = of_pwm_xlate_with_flags; > + imx->chip.of_pwm_n_cells = 3; > + } > > r = platform_get_resource(pdev, IORESOURCE_MEM, 0); > imx->mmio_base = devm_ioremap_resource(&pdev->dev, r);