From: Scott Wood <scott.wood@nxp.com>
To: "Y.T. Tang" <yuantian.tang@nxp.com>,
        "mturquette@baylibre.com" <mturquette@baylibre.com>
CC: "sboyd@codeaurora.org" <sboyd@codeaurora.org>,
        "linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v2] clk: qoriq: added ls1012a clock configuration
Thread-Topic: [PATCH v2] clk: qoriq: added ls1012a clock configuration
Thread-Index: AQHSRJphoShXoQC+5kmMJvXNm4om2w==
Date: Wed, 23 Nov 2016 07:27:07 +0000
Message-ID: <DB5PR0401MB1928B72A81C6867EB699AB0C91B70@DB5PR0401MB1928.eurprd04.prod.outlook.com>
References: <1479802499-9083-1-git-send-email-yuantian.tang@nxp.com>
Accept-Language: en-US
Content-Language: en-US
spamdiagnosticoutput: 1:99
spamdiagnosticmetadata: NSPM
Content-Type: text/plain; charset="us-ascii"
MIME-Version: 1.0
X-MS-Exchange-CrossTenant-originalarrivaltime: 23 Nov 2016 07:27:07.6011
 (UTC)
X-MS-Exchange-CrossTenant-fromentityheader: Hosted
X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635
X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0402MB2847
Sender: linux-kernel-owner@vger.kernel.org
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org
Content-Transfer-Encoding: 8bit
X-MIME-Autoconverted: from quoted-printable to 8bit by mail.home.local id uANA3eLP009311
Content-Length: 1911
Lines: 60

On 11/22/2016 02:28 AM, yuantian.tang@nxp.com wrote:
> From: Tang Yuantian <Yuantian.Tang@nxp.com>
> 
> Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
> ---
> v2:
>   - remove commit message as it is duplicated to title
> 
>  drivers/clk/clk-qoriq.c | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
> 
> diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
> index 1bece0f..65c21d7 100644
> --- a/drivers/clk/clk-qoriq.c
> +++ b/drivers/clk/clk-qoriq.c
> @@ -202,6 +202,14 @@ static const struct clockgen_muxinfo ls1021a_cmux = {
>  	}
>  };
>  
> +static const struct clockgen_muxinfo ls1012a_cmux = {
> +	{
> +		[0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
> +		{},
> +		[2] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
> +	}
> +};
> +
>  static const struct clockgen_muxinfo t1040_cmux = {
>  	{
>  		[0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
> @@ -482,6 +490,16 @@ static const struct clockgen_chipinfo chipinfo[] = {
>  		.pll_mask = 0x03,
>  	},
>  	{
> +		.compat = "fsl,ls1012a-clockgen",
> +		.cmux_groups = {
> +			&ls1012a_cmux
> +		},
> +		.cmux_to_group = {
> +			0, -1
> +		},
> +		.pll_mask = 0x03,
> +	},
> +	{
>  		.compat = "fsl,ls1043a-clockgen",
>  		.init_periph = t2080_init_periph,
>  		.cmux_groups = {
> @@ -1282,6 +1300,7 @@ static void __init clockgen_init(struct device_node *np)
>  CLK_OF_DECLARE(qoriq_clockgen_1, "fsl,qoriq-clockgen-1.0", clockgen_init);
>  CLK_OF_DECLARE(qoriq_clockgen_2, "fsl,qoriq-clockgen-2.0", clockgen_init);
>  CLK_OF_DECLARE(qoriq_clockgen_ls1021a, "fsl,ls1021a-clockgen", clockgen_init);
> +CLK_OF_DECLARE(qoriq_clockgen_ls1012a, "fsl,ls1012a-clockgen", clockgen_init);
>  CLK_OF_DECLARE(qoriq_clockgen_ls1043a, "fsl,ls1043a-clockgen", clockgen_init);
>  CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", clockgen_init);

Again, can you please keep the chip lists sorted?  ls1012a doesn't go
after ls1021a.

-Scott