Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754724AbcKYNkn (ORCPT ); Fri, 25 Nov 2016 08:40:43 -0500 Received: from mail-qt0-f176.google.com ([209.85.216.176]:35183 "EHLO mail-qt0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754283AbcKYNkf (ORCPT ); Fri, 25 Nov 2016 08:40:35 -0500 MIME-Version: 1.0 In-Reply-To: <1480020320-28354-2-git-send-email-peda@axentia.se> References: <1480020320-28354-1-git-send-email-peda@axentia.se> <1480020320-28354-2-git-send-email-peda@axentia.se> From: Linus Walleij Date: Fri, 25 Nov 2016 14:40:33 +0100 Message-ID: Subject: Re: [PATCH 1/3] pinctrl: sx150x: use correct registers for reg_sense (sx1502 and sx1508) To: Peter Rosin Cc: "linux-kernel@vger.kernel.org" , Rob Herring , Mark Rutland , Andrey Smirnov , Neil Armstrong , "linux-gpio@vger.kernel.org" , "devicetree@vger.kernel.org" Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 495 Lines: 14 On Thu, Nov 24, 2016 at 9:45 PM, Peter Rosin wrote: > All other registers on these chips are 8-bit, but reg_sense is 16-bits > and therefore needs to be moved down one notch. > This was apparently overlooked in the conversion to regmap, which only > updated the register locations for the 16-bit chips. > > Fixes: 6489677f86c3 ("pinctrl-sx150x: Replace sx150x_*_cfg by means of regmap API") > Signed-off-by: Peter Rosin Patch applied. Yours, Linus Walleij