Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932917AbcK1MQG (ORCPT ); Mon, 28 Nov 2016 07:16:06 -0500 Received: from mail-wj0-f179.google.com ([209.85.210.179]:34245 "EHLO mail-wj0-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932742AbcK1MPj (ORCPT ); Mon, 28 Nov 2016 07:15:39 -0500 From: Bartosz Golaszewski To: Kevin Hilman , Michael Turquette , Sekhar Nori , Rob Herring , Frank Rowand , Mark Rutland , Peter Ujfalusi , Russell King Cc: LKML , arm-soc , linux-drm , linux-devicetree , Jyri Sarha , Tomi Valkeinen , David Airlie , Laurent Pinchart , Bartosz Golaszewski Subject: [PATCH v2 2/2] ARM: dts: da850-lcdk: specify the maximum pixel clock rate for tilcdc Date: Mon, 28 Nov 2016 13:15:28 +0100 Message-Id: <1480335328-4010-3-git-send-email-bgolaszewski@baylibre.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1480335328-4010-1-git-send-email-bgolaszewski@baylibre.com> References: <1480335328-4010-1-git-send-email-bgolaszewski@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 667 Lines: 26 Due to memory throughput constraints any display mode for which the pixel clock rate exceeds the recommended value of 37500 KHz must be filtered out. Specify the max-pixelclock property for the display node for da850-lcdk. Signed-off-by: Bartosz Golaszewski --- arch/arm/boot/dts/da850-lcdk.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/da850-lcdk.dts b/arch/arm/boot/dts/da850-lcdk.dts index d864f11..1283263 100644 --- a/arch/arm/boot/dts/da850-lcdk.dts +++ b/arch/arm/boot/dts/da850-lcdk.dts @@ -285,6 +285,7 @@ &display { status = "okay"; + max-pixelclock = <37500>; }; &display_out { -- 2.9.3