Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757398AbcK2L6E (ORCPT ); Tue, 29 Nov 2016 06:58:04 -0500 Received: from mail-ua0-f178.google.com ([209.85.217.178]:36843 "EHLO mail-ua0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756987AbcK2L5w (ORCPT ); Tue, 29 Nov 2016 06:57:52 -0500 MIME-Version: 1.0 In-Reply-To: <4f2a02c4-062f-6faf-1024-2a8718a9701f@ti.com> References: <1480335328-4010-1-git-send-email-bgolaszewski@baylibre.com> <1480335328-4010-3-git-send-email-bgolaszewski@baylibre.com> <4f2a02c4-062f-6faf-1024-2a8718a9701f@ti.com> From: Bartosz Golaszewski Date: Tue, 29 Nov 2016 12:57:50 +0100 Message-ID: Subject: Re: [PATCH v2 2/2] ARM: dts: da850-lcdk: specify the maximum pixel clock rate for tilcdc To: Sekhar Nori Cc: Kevin Hilman , Michael Turquette , Rob Herring , Frank Rowand , Mark Rutland , Peter Ujfalusi , Russell King , LKML , arm-soc , linux-drm , linux-devicetree , Jyri Sarha , Tomi Valkeinen , David Airlie , Laurent Pinchart Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1336 Lines: 39 2016-11-29 11:53 GMT+01:00 Sekhar Nori : > On Monday 28 November 2016 05:45 PM, Bartosz Golaszewski wrote: >> Due to memory throughput constraints any display mode for which the >> pixel clock rate exceeds the recommended value of 37500 KHz must be >> filtered out. > > I think there might be more reasons than memory throughput constraints > for the reasoning behind 37.5Mhz cap on pixel clock. Why not just refer > to the datasheet section that places this constraint so we know its a > hardware restriction. > >> >> Specify the max-pixelclock property for the display node for >> da850-lcdk. >> >> Signed-off-by: Bartosz Golaszewski >> --- >> arch/arm/boot/dts/da850-lcdk.dts | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/arch/arm/boot/dts/da850-lcdk.dts b/arch/arm/boot/dts/da850-lcdk.dts >> index d864f11..1283263 100644 >> --- a/arch/arm/boot/dts/da850-lcdk.dts >> +++ b/arch/arm/boot/dts/da850-lcdk.dts >> @@ -285,6 +285,7 @@ >> >> &display { >> status = "okay"; >> + max-pixelclock = <37500>; > > Should this not be in da850.dtsi since its an SoC imposed constraint? If > a board needs narrower constraint, it can override it. But I guess most > well designed boards will just hit the SoC constraint. > Both issues fixed in v3. Thanks, Bartosz Golaszewski