Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756504AbcK2N6n (ORCPT ); Tue, 29 Nov 2016 08:58:43 -0500 Received: from 5.mo1.mail-out.ovh.net ([178.33.45.107]:58748 "EHLO 5.mo1.mail-out.ovh.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754663AbcK2N6g (ORCPT ); Tue, 29 Nov 2016 08:58:36 -0500 X-Greylist: delayed 17178 seconds by postgrey-1.27 at vger.kernel.org; Tue, 29 Nov 2016 08:58:35 EST From: Jacopo Mondi To: geert+renesas@glider.be, magnus.damm@gmail.com, laurent.pinchart@ideasonboard.com, linus.walleij@linaro.org Cc: linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Jacopo Mondi Subject: [PATCH] pinctrl: sh-pfc: r8a7791: Add ADI pinconf support Date: Tue, 29 Nov 2016 10:11:56 +0100 Message-Id: <1480410716-25993-1-git-send-email-jacopo@jmondi.org> X-Mailer: git-send-email 2.7.4 X-Ovh-Tracer-Id: 5074712357304726335 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: 0 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeelfedrfeejgdduvdejucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecufedttdenuc Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 4408 Lines: 144 Add pin configuration support for Gyro-ADC, named ADI on r8a7791 SoC. The Gyro-ADC supports three different configurations: a single ADC (adi and adi_b groups), 2 ADCs selectable through a single channel select signal (adi_chsel1 and adi_chsel1_b groups), up to 4 ADCs through 2 channel select signals (adi_chsel2 and adi_chsel2_b groups) and up to 8 ADCs through 3 channel select signals (adi_chsel3 and adi_chsel3_b groups) Signed-off-by: Jacopo Mondi --- Compiled only, not tested with an actual ADC. For reference only, these are the changes introduced by Geert's private review of first sketch of this patch: * separate ADI chsel in 3 overlapping groups: the user can now select how many pins to assign to channel selection function. --- drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 86 ++++++++++++++++++++++++++++++++++++ 1 file changed, 86 insertions(+) diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c index 7ca37c3..3898747 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c @@ -1691,6 +1691,72 @@ static const struct sh_pfc_pin pinmux_pins[] = { PINMUX_GPIO_GP_ALL(), }; +/* - ADI -------------------------------------------------------------------- */ +static const unsigned int adi_pins[] = { + /* ADIDATA, ADICS, CLK*/ + RCAR_GP_PIN(6, 24), RCAR_GP_PIN(6, 25), RCAR_GP_PIN(6, 26), +}; +static const unsigned int adi_mux[] = { + /* ADIDATA, ADICS, CLK*/ + ADIDATA_MARK, ADICS_SAMP_MARK, ADICLK_MARK, +}; +static const unsigned int adi_chsel1_pins[] = { + /* CHS 0 */ + RCAR_GP_PIN(6, 27), +}; +static const unsigned int adi_chsel1_mux[] = { + /* CHS 0 */ + ADICHS0_MARK, ADICHS1_MARK, ADICHS2_MARK, +}; +static const unsigned int adi_chsel2_pins[] = { + /* CHS 0, 1 */ + RCAR_GP_PIN(6, 27), RCAR_GP_PIN(6, 28), +}; +static const unsigned int adi_chsel2_mux[] = { + /* CHS 0, 1 */ + ADICHS0_MARK, ADICHS1_MARK, ADICHS2_MARK, +}; +static const unsigned int adi_chsel3_pins[] = { + /* CHS 0, 1, 2 */ + RCAR_GP_PIN(6, 27), RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 29), +}; +static const unsigned int adi_chsel3_mux[] = { + /* CHS 0, 1, 2 */ + ADICHS0_MARK, ADICHS1_MARK, ADICHS2_MARK, +}; +static const unsigned int adi_b_pins[] = { + /* ADIDATA B, ADICS B, CLK B */ + RCAR_GP_PIN(5, 25), RCAR_GP_PIN(5, 26), RCAR_GP_PIN(5, 27), +}; +static const unsigned int adi_b_mux[] = { + /* ADIDATA B, ADICS B, CLK B */ + ADIDATA_B_MARK, ADICS_SAMP_B_MARK, ADICLK_B_MARK, +}; +static const unsigned int adi_chsel1_b_pins[] = { + /* CHS B 0 */ + RCAR_GP_PIN(5, 28), +}; +static const unsigned int adi_chsel1_b_mux[] = { + /* CHS B 0 */ + ADICHS0_B_MARK, +}; +static const unsigned int adi_chsel2_b_pins[] = { + /* CHS B 0, 1 */ + RCAR_GP_PIN(5, 28), RCAR_GP_PIN(5, 29), +}; +static const unsigned int adi_chsel2_b_mux[] = { + /* CHS B 0, 1 */ + ADICHS0_B_MARK, ADICHS1_B_MARK, +}; +static const unsigned int adi_chsel3_b_pins[] = { + /* CHS B 0, 1, 2 */ + RCAR_GP_PIN(5, 28), RCAR_GP_PIN(5, 29), RCAR_GP_PIN(5, 30), +}; +static const unsigned int adi_chsel3_b_mux[] = { + /* CHS B 0, 1, 2 */ + ADICHS0_B_MARK, ADICHS1_B_MARK, ADICHS2_B_MARK, +}; + /* - Audio Clock ------------------------------------------------------------ */ static const unsigned int audio_clk_a_pins[] = { /* CLK */ @@ -4343,6 +4409,14 @@ static const unsigned int vin2_clk_mux[] = { }; static const struct sh_pfc_pin_group pinmux_groups[] = { + SH_PFC_PIN_GROUP(adi), + SH_PFC_PIN_GROUP(adi_chsel1), + SH_PFC_PIN_GROUP(adi_chsel2), + SH_PFC_PIN_GROUP(adi_chsel3), + SH_PFC_PIN_GROUP(adi_b), + SH_PFC_PIN_GROUP(adi_chsel1_b), + SH_PFC_PIN_GROUP(adi_chsel2_b), + SH_PFC_PIN_GROUP(adi_chsel3_b), SH_PFC_PIN_GROUP(audio_clk_a), SH_PFC_PIN_GROUP(audio_clk_b), SH_PFC_PIN_GROUP(audio_clk_b_b), @@ -4687,6 +4761,17 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(vin2_clk), }; +static const char * const adi_groups[] = { + "adi", + "adi_chsel1", + "adi_chsel2", + "adi_chsel3", + "adi_b", + "adi_chsel1_b", + "adi_chsel2_b", + "adi_chsel3_b", +}; + static const char * const audio_clk_groups[] = { "audio_clk_a", "audio_clk_b", @@ -5192,6 +5277,7 @@ static const char * const vin2_groups[] = { }; static const struct sh_pfc_function pinmux_functions[] = { + SH_PFC_FUNCTION(adi), SH_PFC_FUNCTION(audio_clk), SH_PFC_FUNCTION(avb), SH_PFC_FUNCTION(can0), -- 2.7.4