Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755129AbcK2RGu convert rfc822-to-8bit (ORCPT ); Tue, 29 Nov 2016 12:06:50 -0500 Received: from mga05.intel.com ([192.55.52.43]:15719 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752196AbcK2RGl (ORCPT ); Tue, 29 Nov 2016 12:06:41 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,717,1473145200"; d="scan'208";a="906800910" From: "Liang, Kan" To: Peter Zijlstra CC: "mingo@redhat.com" , "linux-kernel@vger.kernel.org" , "eranian@google.com" , "alexander.shishkin@linux.intel.com" , "ak@linux.intel.com" , "Odzioba, Lukasz" Subject: RE: [PATCH] perf/x86: fix event counter update issue Thread-Topic: [PATCH] perf/x86: fix event counter update issue Thread-Index: AQHSSa1zo+RK785pc06zvVqph8o/bKDvK4oAgADaq3D//6PyAIAAh3vg Date: Tue, 29 Nov 2016 17:06:36 +0000 Message-ID: <37D7C6CF3E00A74B8858931C1DB2F07750CA4190@SHSMSX103.ccr.corp.intel.com> References: <1480361206-1702-1-git-send-email-kan.liang@intel.com> <20161129092520.GB3092@twins.programming.kicks-ass.net> <37D7C6CF3E00A74B8858931C1DB2F07750CA4064@SHSMSX103.ccr.corp.intel.com> <20161129165830.GM3092@twins.programming.kicks-ass.net> In-Reply-To: <20161129165830.GM3092@twins.programming.kicks-ass.net> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYTdkNjI3ODktY2I4YS00YzViLTk3MjYtZjJiYmNhZmI3NmU3IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6ImErRWNwQ1c0eDRLXC9UMHBrTzZ1amFpbjRxU1c0ZDBaTzRLaWVqXC9vSVlmMD0ifQ== x-ctpclassification: CTP_IC x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1037 Lines: 35 > On Tue, Nov 29, 2016 at 02:46:14PM +0000, Liang, Kan wrote: > > > And note that we _ALWAYS_ set the IN bits, even for !sampling events. > > > Also note we set max_period to (1<<31) - 1, so we should never > > > exceed 31 bits. > > > > > > > The max_period is 0xfffffffff. > > > > The limit is breaked by this patch. > > 069e0c3c4058 ("perf/x86/intel: Support full width counting") > > https://patchwork.kernel.org/patch/2784191/ > > > > /* Support full width counters using alternative MSR range */ > > if (x86_pmu.intel_cap.full_width_write) { > > x86_pmu.max_period = x86_pmu.cntval_mask; > > x86_pmu.perfctr = MSR_IA32_PMC0; > > pr_cont("full-width counters, "); > > } > > > > Wth do KNL/SLM have full_width_write set if they have short counters? Yes, the full_width_write is set on KNL/SLM. > I should the whole point of the full_wdith thing was that in that case the > counters were actually 64bit wide. Even for big core, the counter width is 48 bit. AFAIK, no Intel platform has 64bit wide counter. Thanks, Kan