Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757977AbcK2RS5 (ORCPT ); Tue, 29 Nov 2016 12:18:57 -0500 Received: from bombadil.infradead.org ([198.137.202.9]:59964 "EHLO bombadil.infradead.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756724AbcK2RRS (ORCPT ); Tue, 29 Nov 2016 12:17:18 -0500 Date: Tue, 29 Nov 2016 18:17:15 +0100 From: Peter Zijlstra To: "Liang, Kan" Cc: "mingo@redhat.com" , "linux-kernel@vger.kernel.org" , "eranian@google.com" , "alexander.shishkin@linux.intel.com" , "ak@linux.intel.com" , "Odzioba, Lukasz" Subject: Re: [PATCH] perf/x86: fix event counter update issue Message-ID: <20161129171715.GO3092@twins.programming.kicks-ass.net> References: <1480361206-1702-1-git-send-email-kan.liang@intel.com> <20161129092520.GB3092@twins.programming.kicks-ass.net> <37D7C6CF3E00A74B8858931C1DB2F07750CA4064@SHSMSX103.ccr.corp.intel.com> <20161129165830.GM3092@twins.programming.kicks-ass.net> <37D7C6CF3E00A74B8858931C1DB2F07750CA4190@SHSMSX103.ccr.corp.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <37D7C6CF3E00A74B8858931C1DB2F07750CA4190@SHSMSX103.ccr.corp.intel.com> User-Agent: Mutt/1.5.23.1 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1183 Lines: 34 On Tue, Nov 29, 2016 at 05:06:36PM +0000, Liang, Kan wrote: > > > > On Tue, Nov 29, 2016 at 02:46:14PM +0000, Liang, Kan wrote: > > > > And note that we _ALWAYS_ set the IN bits, even for !sampling events. > > > > Also note we set max_period to (1<<31) - 1, so we should never > > > > exceed 31 bits. > > > > > > > > > > The max_period is 0xfffffffff. > > > > > > The limit is breaked by this patch. > > > 069e0c3c4058 ("perf/x86/intel: Support full width counting") > > > https://patchwork.kernel.org/patch/2784191/ > > > > > > /* Support full width counters using alternative MSR range */ > > > if (x86_pmu.intel_cap.full_width_write) { > > > x86_pmu.max_period = x86_pmu.cntval_mask; > > > x86_pmu.perfctr = MSR_IA32_PMC0; > > > pr_cont("full-width counters, "); > > > } > > > > > > > Wth do KNL/SLM have full_width_write set if they have short counters? > > Yes, the full_width_write is set on KNL/SLM. > > > I should the whole point of the full_wdith thing was that in that case the > > counters were actually 64bit wide. > > Even for big core, the counter width is 48 bit. > AFAIK, no Intel platform has 64bit wide counter. Then yes, that patch is very broken.