Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754782AbcK3GJm (ORCPT ); Wed, 30 Nov 2016 01:09:42 -0500 Received: from conssluserg-05.nifty.com ([210.131.2.90]:23690 "EHLO conssluserg-05.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751582AbcK3GJd (ORCPT ); Wed, 30 Nov 2016 01:09:33 -0500 DKIM-Filter: OpenDKIM Filter v2.10.3 conssluserg-05.nifty.com uAU69U38030072 X-Nifty-SrcIP: [209.85.213.182] MIME-Version: 1.0 In-Reply-To: <20161127172456.5dba79f2@bbrezillon> References: <1480183585-592-1-git-send-email-yamada.masahiro@socionext.com> <1480183585-592-29-git-send-email-yamada.masahiro@socionext.com> <20161127172456.5dba79f2@bbrezillon> From: Masahiro Yamada Date: Wed, 30 Nov 2016 15:09:27 +0900 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 28/39] mtd: nand: denali: move multi NAND fixup code to a helper function To: Boris Brezillon Cc: linux-mtd@lists.infradead.org, Linux Kernel Mailing List , Marek Vasut , Brian Norris , Richard Weinberger , David Woodhouse , Cyrille Pitchen Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1534 Lines: 54 Hi Boris, 2016-11-28 1:24 GMT+09:00 Boris Brezillon : > On Sun, 27 Nov 2016 03:06:14 +0900 > Masahiro Yamada wrote: > >> Collect multi NAND fixups into a helper function instead of >> scattering them in denali_init(). > > Can you tell me more about this multi-NAND feature? > The core is already able to detect multi-die NAND chips in a generic > way, This is not the case. > but I fear this is something else, like "put two 8-bits chips on a > 16bits bus to emulate a single 16bits chip". Yes, it is. (I have never used this controller like that. But, I am pretty sure it is from the code and the Denali's User Guide mentions such usage.) Just in case, I will clearly rephrase the comment block like follows in v2: /* * Support for multi device: * When the IP configuration is x16 capable and two x8 chips are * connected in parallel, DEVICES_CONNECTED should be set to 2. * In this case, the core framework knows nothing about this fact, * so we should tell it the _logical_ pagesize and anything necessary. */ > If that's a case, and this feature is actually used, then it's a bad > idea IMHO. > For example, how do you handle the case where one block is bad on a > chip but not on the other? And I fear this is not the only problem > with this approach :-/. As you expect, if one block is bad, the correspond block on the other chip can not be used. -- Best Regards Masahiro Yamada