Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756381AbcK3P14 convert rfc822-to-8bit (ORCPT ); Wed, 30 Nov 2016 10:27:56 -0500 Received: from mga03.intel.com ([134.134.136.65]:20474 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753980AbcK3P1z (ORCPT ); Wed, 30 Nov 2016 10:27:55 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,574,1473145200"; d="scan'208";a="37435972" From: "Liang, Kan" To: Jiri Olsa CC: Andi Kleen , Peter Zijlstra , Jiri Olsa , lkml , "Ingo Molnar" , Michael Petlan Subject: RE: [RFC] perf/x86/intel/uncore: pmu->type->single_fixed question Thread-Topic: [RFC] perf/x86/intel/uncore: pmu->type->single_fixed question Thread-Index: AQHSSvesQmQH3wRWmkOE9GJRGPB73aDxiqBAgAAbwHA= Date: Wed, 30 Nov 2016 15:27:52 +0000 Message-ID: <37D7C6CF3E00A74B8858931C1DB2F07750CA46F0@SHSMSX103.ccr.corp.intel.com> References: <20161130105105.GA25720@krava> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYWM2MzgyMWYtNDEwNC00ODk0LWJkMDAtMDY2Y2I1ZmI2MDM5IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6ImZUNEpSQk5vbG91b3dPWkNPOGZIU3NIYVwveE5NNFhWMDRFUDNDbnlpeDFJPSJ9 x-ctpclassification: CTP_IC x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1844 Lines: 53 > > > hi, > > I'm trying to find out some documentation background for this part of > > uncore code: > > > > --- > > static int uncore_pmu_event_init(struct perf_event *event) { > > ... > > if (event->attr.config == UNCORE_FIXED_EVENT) { > > /* no fixed counter */ > > if (!pmu->type->fixed_ctl) > > return -EINVAL; > > /* > > * if there is only one fixed counter, only the first pmu > > * can access the fixed counter > > */ > > if (pmu->type->single_fixed && pmu->pmu_idx > 0) > > return -EINVAL; > > ... > > --- > > > > that for some uncore types (those with pmu->type->single_fixed) only > > the first pmu (code_id == 0) will allow to touch the clocktick event > > > > other cores boxes will not allow to open clocktick event, eventhough > > it's announced via /sys/../events/.. > > > > I'm probably missing some HW logic of specific boxes that would > > explain that, but I can't find it. > > The client uncore has a standalone clocktick fixed counter. It doesn't belong > to any boxes, which is different from server uncore. > > But client and server uncore share the same uncore_pmu_event_init. > So it forces that only the first box can access the fixed counter. > > Maybe we should create a clocktick box for client uncore to fix it. > > You can find the fixed counter information from 18.11.6 in latest SDM > (Order Number: 325384-060US). > > There should be a Skylake client uncore document published somewhere. > But I cannot find it from Google. Let me ask around. Here is the published document. http://www.intel.com/content/www/us/en/processors/core/6th-gen-core-family-uncore-performance-monitoring-manual.html > > Thanks, > Kan