Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757141AbcLBSEM (ORCPT ); Fri, 2 Dec 2016 13:04:12 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:44562 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1750781AbcLBSEK (ORCPT ); Fri, 2 Dec 2016 13:04:10 -0500 From: "Aneesh Kumar K.V" To: Dave Hansen , linux-kernel@vger.kernel.org Cc: Dave Hansen , hch@lst.de, akpm@linux-foundation.org, dan.j.williams@intel.com, khandual@linux.vnet.ibm.com, vbabka@suse.cz, linux-mm@kvack.org, linux-arch@vger.kernel.org Subject: Re: [PATCH] proc: mm: export PTE sizes directly in smaps (v3) In-Reply-To: <20161129201703.CE9D5054@viggo.jf.intel.com> References: <20161129201703.CE9D5054@viggo.jf.intel.com> Date: Fri, 02 Dec 2016 21:44:57 +0530 MIME-Version: 1.0 Content-Type: text/plain X-TM-AS-GCONF: 00 X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16120216-0012-0000-0000-0000114B2858 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00006180; HX=3.00000240; KW=3.00000007; PH=3.00000004; SC=3.00000193; SDB=6.00788378; UDB=6.00381466; IPR=6.00566053; BA=6.00004937; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00013515; XFM=3.00000011; UTC=2016-12-02 16:15:05 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 16120216-0013-0000-0000-000047AE6097 Message-Id: <874m2me29q.fsf@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2016-12-02_12:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=1 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1609300000 definitions=main-1612020252 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1309 Lines: 36 Dave Hansen writes: > #ifdef CONFIG_HUGETLB_PAGE > +/* > + * Most architectures have a 1:1 mapping of PTEs to hugetlb page > + * sizes, but there are some outliers like arm64 that use > + * multiple hardware PTEs to make a hugetlb "page". Do not > + * assume that all 'hpage_size's are not exactly at a page table > + * size boundary. Instead, accept arbitrary 'hpage_size's and > + * assume they are made up of the next-smallest size. We do not > + * handle PGD-sized hpages and hugetlb_add_hstate() will WARN() > + * if it sees one. > + * > + * Note also that the page walker code only calls us once per > + * huge 'struct page', *not* once per PTE in the page tables. > + */ > +static void smaps_hugetlb_present_hpage(struct mem_size_stats *mss, > + unsigned long hpage_size) > +{ > + if (hpage_size >= PUD_SIZE) > + mss->rss_pud += hpage_size; > + else if (hpage_size >= PMD_SIZE) > + mss->rss_pmd += hpage_size; > + else > + mss->rss_pte += hpage_size; > +} some powerpc platforms have multiple page table entries mapping the same hugepage and on other, we have a page table entry pointing to something called hugepaeg directory mapping a set of hugepage. So I am not sure the above will work for all those ? Also do we derive pte@ correctly there ? -aneesh