Date: Sat, 3 Dec 2016 15:35:53 -0600
From: Rob Herring <robh@kernel.org>
To: Harini Katakam <harini.katakam@xilinx.com>
Cc: nicolas.ferre@atmel.com, davem@davemloft.net, pawel.moll@arm.com,
        mark.rutland@arm.com, ijc+devicetree@hellion.org.uk,
        galak@codeaurora.org, boris.brezillon@free-electrons.com,
        alexandre.belloni@free-electrons.com, harinikatakamlinux@gmail.com,
        netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
        devicetree@vger.kernel.org, harinik@xilinx.com, michals@xilinx.com
Subject: Re: [RFC PATCH 2/2] Documentation: devictree: Add macb mdio bindings
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On Mon, Nov 28, 2016 at 03:19:27PM +0530, Harini Katakam wrote:
> Add documentations for macb mdio driver.

Bindings document h/w, not drivers.

> 
> Signed-off-by: Harini Katakam <harinik@xilinx.com>
> ---
>  .../devicetree/bindings/net/macb-mdio.txt          | 31 ++++++++++++++++++++++
>  1 file changed, 31 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/net/macb-mdio.txt
> 
> diff --git a/Documentation/devicetree/bindings/net/macb-mdio.txt b/Documentation/devicetree/bindings/net/macb-mdio.txt
> new file mode 100644
> index 0000000..014cedf
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/macb-mdio.txt
> @@ -0,0 +1,31 @@
> +* Cadence MACB MDIO controller
> +
> +Required properties:
> +- compatible: Should be "cdns,macb-mdio"

Only one version ever? This needs more specific compatible strings.

> +- reg: Address and length of the register set of MAC to be used
> +- clock-names: Tuple listing input clock names.
> +	Required elements: 'pclk', 'hclk'
> +	Optional elements: 'tx_clk'
> +- clocks: Phandles to input clocks.
> +
> +Examples:
> +
> +	mdio {
> +		compatible = "cdns,macb-mdio";
> +		reg = <0x0 0xff0b0000 0x0 0x1000>;
> +		clocks = <&clk125>, <&clk125>, <&clk125>;
> +		clock-names = "pclk", "hclk", "tx_clk";
> +		ethernet_phyC: ethernet-phy@C {

lowercase hex for unit addresses please

> +			reg = <0xC>;
> +		};
> +		ethernet_phy7: ethernet-phy@7 {
> +			reg = <0x7>;
> +		};
> +		ethernet_phy3: ethernet-phy@3 {
> +			reg = <0x3>;
> +		};
> +		ethernet_phy8: ethernet-phy@8 {
> +			reg = <0x8>;
> +		};
> +	};
> +
> -- 
> 2.7.4
> 
> --
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