Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751496AbcLDKmO (ORCPT ); Sun, 4 Dec 2016 05:42:14 -0500 Received: from mail-vk0-f53.google.com ([209.85.213.53]:34242 "EHLO mail-vk0-f53.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750778AbcLDKmL (ORCPT ); Sun, 4 Dec 2016 05:42:11 -0500 MIME-Version: 1.0 In-Reply-To: References: <20161201183350.GF30746@bhelgaas-glaptop.roam.corp.google.com> <6d593615-e97f-8738-42be-1f8f4906d2f4@redhat.com> <175F32B0-C73F-4250-9E60-3CE7409F0B0C@redhat.com> <7fa523de-3fbb-1566-f521-927143f73d1e@redhat.com> <1480785308.4751.41.camel@redhat.com> From: Duc Dang Date: Sun, 4 Dec 2016 02:35:28 -0800 Message-ID: Subject: Re: [SPCR] mmio32 iotype access requirements for X-Gene 8250(_dw) UART To: Jon Masters , Mark Salter Cc: Rafael Wysocki , Arnd Bergmann , linux-arm , Linux Kernel Mailing List , patches , Aleksey Makarov , "linux-acpi@vger.kernel.org" , Grant Likely Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1629 Lines: 45 On Sat, Dec 3, 2016 at 12:33 PM, Jon Masters wrote: > Hi Mark, > > On 12/03/2016 12:15 PM, Mark Salter wrote: >> On Sat, 2016-12-03 at 05:06 -0500, Jon Masters wrote: > >>> There is a broader problem with X-Gene SPCR support. The problem is >>> that the 16550 UART in X-Gene requires the 32-bit access quirk (the >>> iotype is set to UPIO_MEM32 for the APMC0D08 device). This means >>> that when univ8250_console_match runs later, it will compare the >>> iotype (MEM32) with the type previously registered with the >>> kernel when the earlycon setup the preferred console. >> >> Linaro has a kernel patch which looks at the bit_width field of the >> port address: >> >> Author: Aleksey Makarov >> Date: Thu Apr 28 19:52:38 2016 +0300 >> >> serial: SPCR: check bit width for the 16550 UART >> >> The SPCR in 3.06.25 firmware has a bit_width field set to 32 and with the >> above patch, I don't need to use console=. But HP firmware on m400 sets >> bit width to 8 so that needs a firmware fix to work with above. Will this patch be posted for upstream? > > Indeed, thanks. Graeme also mentioned that last night. I think this > a good solution for the moment, but still that it makes sense to > have a new 16650 UART type defined in the DBG2 spec for those > requiring 32-bit access (to mirror the type D for pl011). I > heard back from Microsoft this morning that they're looking. Yes, thanks, Jon. It will be nice to have a new 16550 UART type for those requiring 32-bit access. > > Jon. > > -- > Computer Architect | Sent from my Fedora powered laptop > Regards, Duc Dang.