Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752589AbcLFBSz (ORCPT ); Mon, 5 Dec 2016 20:18:55 -0500 Received: from host.buserror.net ([209.198.135.123]:50271 "EHLO host.buserror.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751972AbcLFBSx (ORCPT ); Mon, 5 Dec 2016 20:18:53 -0500 Message-ID: <1480987116.32531.17.camel@buserror.net> From: Scott Wood To: Christophe Leroy , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Date: Mon, 05 Dec 2016 19:18:36 -0600 In-Reply-To: <69b1226ce134761fd7ab81a498bdb85cd737280f.1474441302.git.christophe.leroy@c-s.fr> References: <69b1226ce134761fd7ab81a498bdb85cd737280f.1474441302.git.christophe.leroy@c-s.fr> Organization: NXP Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.18.5.2-0ubuntu3 Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 50.171.225.118 X-SA-Exim-Mail-From: oss@buserror.net X-Spam-Report: * -1.0 ALL_TRUSTED Passed through trusted hosts only via SMTP * -15 BAYES_00 BODY: Bayes spam probability is 0 to 1% * [score: 0.0000] Subject: Re: [PATCH v3 2/3] powerpc: get hugetlbpage handling more generic X-SA-Exim-Version: 4.2.1 (built Mon, 26 Dec 2011 16:57:07 +0000) X-SA-Exim-Scanned: Yes (on host.buserror.net) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2179 Lines: 48 On Wed, 2016-09-21 at 10:11 +0200, Christophe Leroy wrote: > Today there are two implementations of hugetlbpages which are managed > by exclusive #ifdefs: > * FSL_BOOKE: several directory entries points to the same single hugepage > * BOOK3S: one upper level directory entry points to a table of hugepages > > In preparation of implementation of hugepage support on the 8xx, we > need a mix of the two above solutions, because the 8xx needs both cases > depending on the size of pages: > * In 4k page size mode, each PGD entry covers a 4M bytes area. It means > that 2 PGD entries will be necessary to cover an 8M hugepage while a > single PGD entry will cover 8x 512k hugepages. > * In 16 page size mode, each PGD entry covers a 64M bytes area. It means > that 8x 8M hugepages will be covered by one PGD entry and 64x 512k > hugepages will be covers by one PGD entry. > > This patch: > * removes #ifdefs in favor of if/else based on the range sizes > * merges the two huge_pte_alloc() functions as they are pretty similar > * merges the two hugetlbpage_init() functions as they are pretty similar [snip] > @@ -860,16 +803,34 @@ static int __init hugetlbpage_init(void) >    * if we have pdshift and shift value same, we don't >    * use pgt cache for hugepd. >    */ > - if (pdshift != shift) { > + if (pdshift > shift) { >   pgtable_cache_add(pdshift - shift, NULL); >   if (!PGT_CACHE(pdshift - shift)) >   panic("hugetlbpage_init(): could not create > " >         "pgtable cache for %d bit > pagesize\n", shift); >   } > +#ifdef CONFIG_PPC_FSL_BOOK3E > + else if (!hugepte_cache) { This else never triggers on book3e, because the way this function calculates pdshift is wrong for book3e (it uses PyD_SHIFT instead of HUGEPD_PxD_SHIFT).  We later get OOMs because huge_pte_alloc() calculates pdshift correctly, tries to use hugepte_cache, and fails. If the point of this patch is to remove the compile-time decision on whether to do things the book3e way, why are there still ifdefs such as the ones controlling the definition of HUGEPD_PxD_SHIFT?  How does what you're doing on 8xx (for certain page sizes) differ from book3e? -Scott