Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753471AbcLFMqF (ORCPT ); Tue, 6 Dec 2016 07:46:05 -0500 Received: from mail-wm0-f41.google.com ([74.125.82.41]:35097 "EHLO mail-wm0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752384AbcLFMkJ (ORCPT ); Tue, 6 Dec 2016 07:40:09 -0500 From: Benjamin Gaignard X-Google-Original-From: Benjamin Gaignard To: lee.jones@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, alexandre.torgue@st.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, thierry.reding@gmail.com, linux-pwm@vger.kernel.org, jic23@kernel.org, knaack.h@gmx.de, lars@metafoo.de, pmeerw@pmeerw.net, linux-iio@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: fabrice.gasnier@st.com, gerald.baeza@st.com, arnaud.pouliquen@st.com, linus.walleij@linaro.org, linaro-kernel@lists.linaro.org, benjamin.gaignard@linaro.org, Benjamin Gaignard Subject: [PATCH v4 3/7] PWM: add pwm-stm32 DT bindings Date: Tue, 6 Dec 2016 13:38:45 +0100 Message-Id: <1481027929-13704-4-git-send-email-benjamin.gaignard@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1481027929-13704-1-git-send-email-benjamin.gaignard@st.com> References: <1481027929-13704-1-git-send-email-benjamin.gaignard@st.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1677 Lines: 52 Define bindings for pwm-stm32 version 2: - use parameters instead of compatible of handle the hardware configuration Signed-off-by: Benjamin Gaignard --- .../devicetree/bindings/pwm/pwm-stm32.txt | 33 ++++++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-stm32.txt diff --git a/Documentation/devicetree/bindings/pwm/pwm-stm32.txt b/Documentation/devicetree/bindings/pwm/pwm-stm32.txt new file mode 100644 index 0000000..c0cc246 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/pwm-stm32.txt @@ -0,0 +1,33 @@ +STMicroelectronics STM32 General Purpose Timer PWM bindings + +Must be a sub-node of an STM32 General Purpose Timer device tree node. +See ../mfd/stm32-general-purpose-timer.txt for details about the parent node. + +Required parameters: +- compatible: Must be "st,stm32-pwm". +- pinctrl-names: Set to "default". +- pinctrl-0: List of phandles pointing to pin configuration nodes for PWM module. + For Pinctrl properties see ../pinctrl/pinctrl-bindings.txt + +Optional parameters: +- st,breakinput-polarity: If present, a break input is available + for the channel. In that case the property value denotes the + polarity of the break input: + - 0: active low + - 1: active high + +Example: + gptimer@40010000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-gptimer"; + reg = <0x40010000 0x400>; + clocks = <&rcc 0 160>; + clock-names = "clk_int"; + + pwm@0 { + compatible = "st,stm32-pwm"; + pinctrl-0 = <&pwm1_pins>; + pinctrl-names = "default"; + }; + }; -- 1.9.1