Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932671AbcLGQv5 (ORCPT ); Wed, 7 Dec 2016 11:51:57 -0500 Received: from mail-wj0-f195.google.com ([209.85.210.195]:35236 "EHLO mail-wj0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752195AbcLGQvv (ORCPT ); Wed, 7 Dec 2016 11:51:51 -0500 From: "M'boumba Cedric Madianga" To: wsa@the-dreams.de, robh+dt@kernel.org, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, linus.walleij@linaro.org, patrice.chotard@st.com, linux@armlinux.org.uk, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: "M'boumba Cedric Madianga" Subject: [PATCH v4 3/5] ARM: dts: Add I2C1 support for STM32F429 SoC Date: Wed, 7 Dec 2016 17:51:30 +0100 Message-Id: <1481129492-26600-4-git-send-email-cedric.madianga@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1481129492-26600-1-git-send-email-cedric.madianga@gmail.com> References: <1481129492-26600-1-git-send-email-cedric.madianga@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1280 Lines: 56 Signed-off-by: Patrice Chotard Signed-off-by: M'boumba Cedric Madianga --- arch/arm/boot/dts/stm32f429.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index 7de52ee..cbdece7 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -48,6 +48,7 @@ #include "skeleton.dtsi" #include "armv7-m.dtsi" #include +#include / { clocks { @@ -337,6 +338,16 @@ slew-rate = <2>; }; }; + + i2c1_pins_b: i2c1@0 { + pins1 { + pinmux = ; + drive-open-drain; + }; + pins2 { + pinmux = ; + }; + }; }; rcc: rcc@40023810 { @@ -409,6 +420,18 @@ interrupts = <80>; clocks = <&rcc 0 38>; }; + + i2c1: i2c@40005400 { + compatible = "st,stm32f4-i2c"; + reg = <0x40005400 0x400>; + interrupts = <31>, + <32>; + resets = <&rcc STM32F4_APB1_RESET(I2C1)>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(I2C1)>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; }; -- 1.9.1