Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933163AbcLGVUh (ORCPT ); Wed, 7 Dec 2016 16:20:37 -0500 Received: from mail-pg0-f67.google.com ([74.125.83.67]:36091 "EHLO mail-pg0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932614AbcLGVUe (ORCPT ); Wed, 7 Dec 2016 16:20:34 -0500 From: Joshua Clayton To: Alan Tull , Moritz Fischer , Mark Rutland , Russell King Cc: Rob Herring , Anatolij Gustschin , Joshua Clayton , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v5 2/3] doc: dt: add cyclone-ps-spi binding document Date: Wed, 7 Dec 2016 13:04:39 -0800 Message-Id: <0825a00c127aff5933d8ca991810af00b9bc19dc.1481139171.git.stillcompiling@gmail.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1615 Lines: 42 Describe a cyclone-ps-spi devicetree entry, required features Signed-off-by: Joshua Clayton Acked-by: Rob Herring --- .../bindings/fpga/cyclone-ps-spi-fpga-mgr.txt | 25 ++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/cyclone-ps-spi-fpga-mgr.txt diff --git a/Documentation/devicetree/bindings/fpga/cyclone-ps-spi-fpga-mgr.txt b/Documentation/devicetree/bindings/fpga/cyclone-ps-spi-fpga-mgr.txt new file mode 100644 index 0000000..3f515c7 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/cyclone-ps-spi-fpga-mgr.txt @@ -0,0 +1,25 @@ +Altera Cyclone Passive Serial SPI FPGA Manager + +Altera Cyclone FPGAs support a method of loading the bitstream over what is +referred to as "passive serial". +The passive serial link is not technically spi, and might require extra +circuits in order to play nicely with other spi slaves on the same bus. + +See https://www.altera.com/literature/hb/cyc/cyc_c51013.pdf + +Required properties: +- compatible : should contain "altr,cyclone-ps-spi-fpga-mgr" +- reg : spi slave id of the fpga +- config-gpios : config pin (referred to as nCONFIG in the cyclone manual) +- status-gpios : status pin (referred to as nSTATUS in the cyclone manual) + +both gpios pins are normally active low open drain. + +Example: + fpga_spi: evi-fpga-spi@0 { + compatible = "altr,cyclone-ps-spi-fpga-mgr"; + spi-max-frequency = <20000000>; + reg = <0>; + config-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>; + status-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; + }; -- 2.9.3