Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753119AbcLLOtI convert rfc822-to-8bit (ORCPT ); Mon, 12 Dec 2016 09:49:08 -0500 Received: from mga05.intel.com ([192.55.52.43]:54855 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752768AbcLLOtG (ORCPT ); Mon, 12 Dec 2016 09:49:06 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,336,1477983600"; d="scan'208";a="1080767841" From: "Liang, Kan" To: Peter Zijlstra , "Jiri Olsa (jolsa@kernel.org)" , "Jiri Olsa (jolsa@redhat.com)" CC: Andi Kleen , lkml , Ingo Molnar , Michael Petlan Subject: RE: [RFC] perf/x86/intel/uncore: pmu->type->single_fixed question Thread-Topic: [RFC] perf/x86/intel/uncore: pmu->type->single_fixed question Thread-Index: AQHSSzJ8QmQH3wRWmkOE9GJRGPB73aDzSKXg//99YoCAEa7+YA== Date: Mon, 12 Dec 2016 14:49:03 +0000 Message-ID: <37D7C6CF3E00A74B8858931C1DB2F077536777DA@SHSMSX103.ccr.corp.intel.com> References: <20161130105105.GA25720@krava> <37D7C6CF3E00A74B8858931C1DB2F07750CA4697@SHSMSX103.ccr.corp.intel.com> <878ts0vos0.fsf@firstfloor.org> <37D7C6CF3E00A74B8858931C1DB2F07750CA4D86@SHSMSX103.ccr.corp.intel.com> <20161201163755.GM3092@twins.programming.kicks-ass.net> In-Reply-To: <20161201163755.GM3092@twins.programming.kicks-ass.net> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNzFlOTk0MTQtYjM2ZC00NDQzLThkYWItNTgwMTZlZDdlYzQ3IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6IlZROVVTVkNQVXgxVThhMjJoMm9QK1BrTG4yZlBEbzNmSkNsQm04WklUZ0E9In0= x-ctpclassification: CTP_IC x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 5290 Lines: 167 > I really would prefer to move the thing to its own PMU. The patch as below creates a new PMU to fix the issue. Jirka, could you please try the patch on your machine? Thanks, Kan ------- >From 2de8b2eda6b54734e08a608b5fc8c367b94369d3 Mon Sep 17 00:00:00 2001 From: Kan Liang Date: Mon, 12 Dec 2016 09:03:35 -0500 Subject: [PATCH] perf/x86/intel/uncore: fix nonexistent clockticks event for client uncore The clockticks event can only be used by the first Cbox pmu. Other Cboxes don't allow to open clockticks event, eventhough it's announced via /sys/../events/.. For client uncore, there is only one clocktick fixed counter. Current kernel code forces that only the first box can access the fixed counter in uncore_pmu_event_init. But it doesn't take care of the the attr_groups. All the pmus of same type share the same attr_groups. If the clockticks event is set for the first box, user can also observe the event in other boxes. The clocktick fixed counter is a standalone counter. It should be removed from the Cbox PMUs. A new type of PMU is added which only supports fixed counter events. User observable changes with the patch. clockticks event is removed from Cbox. It will return unsupported, if uncore_cbox_0/clockticks/ is accessed. User may need to change their script to use uncore_clock/clockticks/ to instead. Signed-off-by: Kan Liang --- arch/x86/events/intel/uncore.c | 13 +++++++------ arch/x86/events/intel/uncore_snb.c | 38 +++++++++++++++++++++++++++----------- 2 files changed, 34 insertions(+), 17 deletions(-) diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c index dbaaf7dc..03afeca 100644 --- a/arch/x86/events/intel/uncore.c +++ b/arch/x86/events/intel/uncore.c @@ -652,6 +652,10 @@ static int uncore_pmu_event_init(struct perf_event *event) if (hwc->sample_period) return -EINVAL; + /* Single fixed PMU only has fixed event */ + if (pmu->type->single_fixed && (event->attr.config != UNCORE_FIXED_EVENT)) + return -EINVAL; + /* * Place all uncore events for a particular physical package * onto a single cpu @@ -675,12 +679,9 @@ static int uncore_pmu_event_init(struct perf_event *event) /* no fixed counter */ if (!pmu->type->fixed_ctl) return -EINVAL; - /* - * if there is only one fixed counter, only the first pmu - * can access the fixed counter - */ - if (pmu->type->single_fixed && pmu->pmu_idx > 0) - return -EINVAL; + + if (pmu->type->single_fixed) + event->hw.idx = UNCORE_PMC_IDX_FIXED; /* fixed counters have event field hardcoded to zero */ hwc->config = 0ULL; diff --git a/arch/x86/events/intel/uncore_snb.c b/arch/x86/events/intel/uncore_snb.c index a3dcc12..1b037ea 100644 --- a/arch/x86/events/intel/uncore_snb.c +++ b/arch/x86/events/intel/uncore_snb.c @@ -117,7 +117,7 @@ static void snb_uncore_msr_exit_box(struct intel_uncore_box *box) } static struct uncore_event_desc snb_uncore_events[] = { - INTEL_UNCORE_EVENT_DESC(clockticks, "event=0xff,umask=0x00"), + INTEL_UNCORE_EVENT_DESC(clockticks, "event=0xff"), { /* end: all zeroes */ }, }; @@ -155,17 +155,12 @@ static struct intel_uncore_type snb_uncore_cbox = { .num_counters = 2, .num_boxes = 4, .perf_ctr_bits = 44, - .fixed_ctr_bits = 48, .perf_ctr = SNB_UNC_CBO_0_PER_CTR0, .event_ctl = SNB_UNC_CBO_0_PERFEVTSEL0, - .fixed_ctr = SNB_UNC_FIXED_CTR, - .fixed_ctl = SNB_UNC_FIXED_CTR_CTRL, - .single_fixed = 1, .event_mask = SNB_UNC_RAW_EVENT_MASK, .msr_offset = SNB_UNC_CBO_MSR_OFFSET, .ops = &snb_uncore_msr_ops, .format_group = &snb_uncore_format_group, - .event_descs = snb_uncore_events, }; static struct intel_uncore_type snb_uncore_arb = { @@ -182,9 +177,34 @@ static struct intel_uncore_type snb_uncore_arb = { .format_group = &snb_uncore_format_group, }; +static struct attribute *snb_uncore_clock_formats_attr[] = { + &format_attr_event.attr, + NULL, +}; + +static struct attribute_group snb_uncore_clock_format_group = { + .name = "format", + .attrs = snb_uncore_clock_formats_attr, +}; + +static struct intel_uncore_type snb_uncore_clockbox = { + .name = "clock", + .num_counters = 1, + .num_boxes = 1, + .fixed_ctr_bits = 48, + .fixed_ctr = SNB_UNC_FIXED_CTR, + .fixed_ctl = SNB_UNC_FIXED_CTR_CTRL, + .single_fixed = 1, + .event_mask = SNB_UNC_CTL_EV_SEL_MASK, + .format_group = &snb_uncore_clock_format_group, + .ops = &snb_uncore_msr_ops, + .event_descs = snb_uncore_events, +}; + static struct intel_uncore_type *snb_msr_uncores[] = { &snb_uncore_cbox, &snb_uncore_arb, + &snb_uncore_clockbox, NULL, }; @@ -229,22 +249,18 @@ static struct intel_uncore_type skl_uncore_cbox = { .num_counters = 4, .num_boxes = 5, .perf_ctr_bits = 44, - .fixed_ctr_bits = 48, .perf_ctr = SNB_UNC_CBO_0_PER_CTR0, .event_ctl = SNB_UNC_CBO_0_PERFEVTSEL0, - .fixed_ctr = SNB_UNC_FIXED_CTR, - .fixed_ctl = SNB_UNC_FIXED_CTR_CTRL, - .single_fixed = 1, .event_mask = SNB_UNC_RAW_EVENT_MASK, .msr_offset = SNB_UNC_CBO_MSR_OFFSET, .ops = &skl_uncore_msr_ops, .format_group = &snb_uncore_format_group, - .event_descs = snb_uncore_events, }; static struct intel_uncore_type *skl_msr_uncores[] = { &skl_uncore_cbox, &snb_uncore_arb, + &snb_uncore_clockbox, NULL, }; -- 2.4.3