Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753384AbcLMIs2 (ORCPT ); Tue, 13 Dec 2016 03:48:28 -0500 Received: from regular1.263xmail.com ([211.150.99.138]:57239 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932274AbcLMIsV (ORCPT ); Tue, 13 Dec 2016 03:48:21 -0500 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-RL-SENDER: zhangqing@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: zhangqing@rock-chips.com X-UNIQUE-TAG: <7b12165066e807a0710b8de0a210ecd1> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 From: Elaine Zhang To: heiko@sntech.de, mturquette@baylibre.com, sboyd@codeaurora.org, xf@rock-chips.com Cc: robh+dt@kernel.org, mark.rutland@arm.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, huangtao@rock-chips.com, xxx@rock-chips.com, cl@rock-chips.com, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Elaine Zhang Subject: [PATCH v1 0/3] clk: rockchip: support clk controller for rk3328 SoC Date: Tue, 13 Dec 2016 16:47:46 +0800 Message-Id: <1481618869-1239-1-git-send-email-zhangqing@rock-chips.com> X-Mailer: git-send-email 1.9.1 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 645 Lines: 17 Elaine Zhang (3): clk: rockchip: add dt-binding header for rk3328 clk: rockchip: add clock controller for rk3328 clk: rockchip: add new pll-type for rk3328 and similar socs drivers/clk/rockchip/Makefile | 1 + drivers/clk/rockchip/clk-pll.c | 13 +- drivers/clk/rockchip/clk-rk3328.c | 1068 ++++++++++++++++++++++++++++++++ drivers/clk/rockchip/clk.h | 23 + include/dt-bindings/clock/rk3328-cru.h | 403 ++++++++++++ 5 files changed, 1507 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/rockchip/clk-rk3328.c create mode 100644 include/dt-bindings/clock/rk3328-cru.h -- 1.9.1