Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932585AbcLMKWD (ORCPT ); Tue, 13 Dec 2016 05:22:03 -0500 Received: from mga06.intel.com ([134.134.136.31]:26325 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932467AbcLMKWA (ORCPT ); Tue, 13 Dec 2016 05:22:00 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,340,1477983600"; d="scan'208";a="202015911" Date: Tue, 13 Dec 2016 12:19:45 +0200 From: Mika Westerberg To: Joe Perches Cc: Andy Shevchenko , Tin Huynh , Jarkko Nikula , Wolfram Sang , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, Loc Ho , Thang Nguyen , Phong Vo , patches@apm.com Subject: Re: [PATCH V3] i2c: designware: fix wrong tx/rx fifo for ACPI Message-ID: <20161213101945.GE1460@lahna.fi.intel.com> References: <1481531810-31695-1-git-send-email-tnhuynh@apm.com> <1481569373.7188.48.camel@linux.intel.com> <20161212192113.GA1460@lahna.fi.intel.com> <1481571319.1764.32.camel@perches.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1481571319.1764.32.camel@perches.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo User-Agent: Mutt/1.7.1 (2016-10-04) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1193 Lines: 28 On Mon, Dec 12, 2016 at 11:35:19AM -0800, Joe Perches wrote: > On Mon, 2016-12-12 at 21:21 +0200, Mika Westerberg wrote: > > On Mon, Dec 12, 2016 at 09:02:53PM +0200, Andy Shevchenko wrote: > > > > + tx_fifo_depth = ((param1 >> 16) & 0xff) + 1; > > > > + rx_fifo_depth = ((param1 >> 8)??& 0xff) + 1; > > > > + if (!dev->tx_fifo_depth) { > > > > + dev->tx_fifo_depth = tx_fifo_depth; > > > > + dev->rx_fifo_depth = rx_fifo_depth; > > > > + } else if (tx_fifo_depth) { > > > > + dev->tx_fifo_depth = min_t(u32, dev->tx_fifo_depth, > > > > + tx_fifo_depth); > > > > + dev->rx_fifo_depth = min_t(u32, dev->rx_fifo_depth, > > > > + rx_fifo_depth); > > > > + } > > > > > > So, let's clarify here: > > > Is it possible to have an IP without parameter block enabled? I mean to > > > read something arbitrary (or zeroes, or all-ones) from param1. > > > > Yes and it is Intel IP. Haswell IIRC and it returned zeroes. > > The "+ 1" in the first set of tx_fifo_depth > makes the "else if" check unnecessary. Good point. I did not notice that change at all. The designware I2C databook I have here says that 0 is reserved value and FIFO sizes start from 2 so the above is wrong either way.