Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756686AbcLPFoh (ORCPT ); Fri, 16 Dec 2016 00:44:37 -0500 Received: from mail-db5eur01on0076.outbound.protection.outlook.com ([104.47.2.76]:3188 "EHLO EUR01-DB5-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1750799AbcLPFo3 (ORCPT ); Fri, 16 Dec 2016 00:44:29 -0500 From: Jerry Huang To: Jerry Huang , "balbi@kernel.org" , "gregkh@linuxfoundation.org" CC: "linux-usb@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Rajesh Bhagat Subject: RE: [PATCH] USB3/DWC3: Enable undefined length INCR burst type Thread-Topic: [PATCH] USB3/DWC3: Enable undefined length INCR burst type Thread-Index: AQHSVSKUGATAu7bkYUajSqFxHuv8nqEJ6Hqg Date: Fri, 16 Dec 2016 03:07:07 +0000 Message-ID: References: <1481619983-4782-1-git-send-email-jerry.huang@nxp.com> In-Reply-To: <1481619983-4782-1-git-send-email-jerry.huang@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=jerry.huang@nxp.com; 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x-ms-office365-filtering-correlation-id: 02658fb6-5a84-46a0-5a48-08d425609ed4 x-microsoft-antispam: UriScan:;BCL:0;PCL:0;RULEID:(22001);SRVR:DB5PR0401MB1814; x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(9452136761055)(185117386973197); x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(6040375)(601004)(2401047)(8121501046)(5005006)(3002001)(10201501046)(6055026)(6041248)(20161123564025)(20161123555025)(20161123560025)(20161123558021)(20161123562025)(6072148)(6047074);SRVR:DB5PR0401MB1814;BCL:0;PCL:0;RULEID:;SRVR:DB5PR0401MB1814; x-forefront-prvs: 01583E185C spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-originalarrivaltime: 16 Dec 2016 03:07:07.6076 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR0401MB1814 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by mail.home.local id uBG5ifHf022791 Content-Length: 2570 Lines: 65 > -----Original Message----- > From: Changming Huang [mailto:jerry.huang@nxp.com] > Sent: Tuesday, December 13, 2016 5:06 PM > To: balbi@kernel.org; gregkh@linuxfoundation.org > Cc: linux-usb@vger.kernel.org; linux-kernel@vger.kernel.org; Jerry Huang > ; Rajesh Bhagat > Subject: [PATCH] USB3/DWC3: Enable undefined length INCR burst type > > While enabling undefined length INCR burst type and INCR16 burst type, get > better write performance on NXP Layerscape platform: > around 3% improvement (from 364MB/s to 375MB/s). > > Signed-off-by: Changming Huang > Signed-off-by: Rajesh Bhagat > --- > drivers/usb/dwc3/core.c | 6 ++++++ > drivers/usb/dwc3/core.h | 13 +++++++++++++ > 2 files changed, 19 insertions(+) > > diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index > fea4469..0e11891 100644 > --- a/drivers/usb/dwc3/core.c > +++ b/drivers/usb/dwc3/core.c > @@ -621,6 +621,12 @@ static int dwc3_core_init(struct dwc3 *dwc) > goto err0; > } > > + /* Enable Undefined Length INCR Burst Type and Enable INCR16 > Burst */ > + reg = dwc3_readl(dwc->regs, DWC3_GSBUSCFG0); > + reg &= ~DWC3_GSBUSCFG0_INCRBRSTMASK; > + reg |= DWC3_GSBUSCFG0_INCR16BRSTENA | > DWC3_GSBUSCFG0_INCRBRSTENA; > + dwc3_writel(dwc->regs, DWC3_GSBUSCFG0, reg); > + > /* > * Write Linux Version Code to our GUID register so it's easy to figure > * out which kernel version a bug was found. > diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index > 6b60e42..8bfdb77 100644 > --- a/drivers/usb/dwc3/core.h > +++ b/drivers/usb/dwc3/core.h > @@ -156,6 +156,19 @@ > > /* Bit fields */ > > +/* Global SoC Bus Configuration Register 0 */ > +#define DWC3_GSBUSCFG0_DATABIGEND (1 << 11) > +#define DWC3_GSBUSCFG0_DESCBIGEND (1 << 10) > +#define DWC3_GSBUSCFG0_INCR256BRSTENA (1 << 7) > +#define DWC3_GSBUSCFG0_INCR128BRSTENA (1 << 6) > +#define DWC3_GSBUSCFG0_INCR64BRSTENA (1 << 5) > +#define DWC3_GSBUSCFG0_INCR32BRSTENA (1 << 4) > +#define DWC3_GSBUSCFG0_INCR16BRSTENA (1 << 3) > +#define DWC3_GSBUSCFG0_INCR8BRSTENA (1 << 2) > +#define DWC3_GSBUSCFG0_INCR4BRSTENA (1 << 1) > +#define DWC3_GSBUSCFG0_INCRBRSTENA (1 << 0) > +#define DWC3_GSBUSCFG0_INCRBRSTMASK 0xff > + > /* Global Debug Queue/FIFO Space Available Register */ > #define DWC3_GDBGFIFOSPACE_NUM(n) ((n) & 0x1f) > #define DWC3_GDBGFIFOSPACE_TYPE(n) (((n) << 5) & 0x1e0) > -- I will split this patch to two, one is for the performance tune, the other for macro definition in header file.