Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1762845AbcLSCVT (ORCPT ); Sun, 18 Dec 2016 21:21:19 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:23318 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1762036AbcLSCUy (ORCPT ); Sun, 18 Dec 2016 21:20:54 -0500 From: Ryder Lee To: Herbert Xu , "David S. Miller" , Matthias Brugger CC: , , , , , Sean Wang , Roy Luo , Ryder Lee Subject: [PATCH v3 2/2] crypto: mediatek - add DT bindings documentation Date: Mon, 19 Dec 2016 10:20:45 +0800 Message-ID: <1482114045-18716-3-git-send-email-ryder.lee@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1482114045-18716-1-git-send-email-ryder.lee@mediatek.com> References: <1482114045-18716-1-git-send-email-ryder.lee@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1601 Lines: 43 Add DT bindings documentation for the crypto driver Signed-off-by: Ryder Lee --- .../devicetree/bindings/crypto/mediatek-crypto.txt | 27 ++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/mediatek-crypto.txt diff --git a/Documentation/devicetree/bindings/crypto/mediatek-crypto.txt b/Documentation/devicetree/bindings/crypto/mediatek-crypto.txt new file mode 100644 index 0000000..c204725 --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/mediatek-crypto.txt @@ -0,0 +1,27 @@ +MediaTek cryptographic accelerators + +Required properties: +- compatible: Should be "mediatek,eip97-crypto" +- reg: Address and length of the register set for the device +- interrupts: Should contain the five crypto engines interrupts in numeric + order. These are global system and four descriptor rings. +- clocks: the clock used by the core +- clock-names: the names of the clock listed in the clocks property. These are + "ethif", "cryp" +- power-domains: Must contain a reference to the PM domain. + + +Example: + crypto: crypto@1b240000 { + compatible = "mediatek,eip97-crypto"; + reg = <0 0x1b240000 0 0x20000>; + interrupts = , + , + , + , + ; + clocks = <&topckgen CLK_TOP_ETHIF_SEL>, + <ðsys CLK_ETHSYS_CRYPTO>; + clock-names = "ethif","cryp"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>; + }; -- 1.9.1