Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1762084AbcLSLHp (ORCPT ); Mon, 19 Dec 2016 06:07:45 -0500 Received: from terminus.zytor.com ([198.137.202.10]:58690 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1761932AbcLSLHn (ORCPT ); Mon, 19 Dec 2016 06:07:43 -0500 Date: Mon, 19 Dec 2016 03:05:05 -0800 From: tip-bot for Andy Lutomirski Message-ID: Cc: peterz@infradead.org, luto@kernel.org, hpa@zytor.com, boris.ostrovsky@oracle.com, gnomes@lxorguk.ukuu.org.uk, tglx@linutronix.de, tedheadster@gmail.com, jgross@suse.com, bp@alien8.de, brgerst@gmail.com, hmh@hmh.eng.br, mingo@kernel.org, Xen-devel@lists.xen.org, andrew.cooper3@citrix.com, linux-kernel@vger.kernel.org Reply-To: luto@kernel.org, peterz@infradead.org, tglx@linutronix.de, gnomes@lxorguk.ukuu.org.uk, boris.ostrovsky@oracle.com, hpa@zytor.com, tedheadster@gmail.com, bp@alien8.de, jgross@suse.com, brgerst@gmail.com, hmh@hmh.eng.br, Xen-devel@lists.xen.org, mingo@kernel.org, linux-kernel@vger.kernel.org, andrew.cooper3@citrix.com In-Reply-To: <535a025bb91fed1a019c5412b036337ad239e5bb.1481307769.git.luto@kernel.org> References: <535a025bb91fed1a019c5412b036337ad239e5bb.1481307769.git.luto@kernel.org> To: linux-tip-commits@vger.kernel.org Subject: [tip:x86/urgent] x86/microcode/intel: Replace sync_core() with native_cpuid() Git-Commit-ID: 484d0e5c7943644cc46e7308a8f9d83be598f2b9 X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3241 Lines: 89 Commit-ID: 484d0e5c7943644cc46e7308a8f9d83be598f2b9 Gitweb: http://git.kernel.org/tip/484d0e5c7943644cc46e7308a8f9d83be598f2b9 Author: Andy Lutomirski AuthorDate: Fri, 9 Dec 2016 10:24:07 -0800 Committer: Thomas Gleixner CommitDate: Mon, 19 Dec 2016 11:54:21 +0100 x86/microcode/intel: Replace sync_core() with native_cpuid() The Intel microcode driver is using sync_core() to mean "do CPUID with EAX=1". I want to rework sync_core(), but first the Intel microcode driver needs to stop depending on its current behavior. Reported-by: Henrique de Moraes Holschuh Signed-off-by: Andy Lutomirski Acked-by: Borislav Petkov Cc: Juergen Gross Cc: One Thousand Gnomes Cc: Peter Zijlstra Cc: Brian Gerst Cc: Matthew Whitehead Cc: Andrew Cooper Cc: Boris Ostrovsky Cc: xen-devel Link: http://lkml.kernel.org/r/535a025bb91fed1a019c5412b036337ad239e5bb.1481307769.git.luto@kernel.org Signed-off-by: Thomas Gleixner --- arch/x86/kernel/cpu/microcode/intel.c | 26 +++++++++++++++++++++++--- 1 file changed, 23 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c index 54d50c3..b624b54 100644 --- a/arch/x86/kernel/cpu/microcode/intel.c +++ b/arch/x86/kernel/cpu/microcode/intel.c @@ -368,6 +368,26 @@ next: return patch; } +static void cpuid_1(void) +{ + /* + * According to the Intel SDM, Volume 3, 9.11.7: + * + * CPUID returns a value in a model specific register in + * addition to its usual register return values. The + * semantics of CPUID cause it to deposit an update ID value + * in the 64-bit model-specific register at address 08BH + * (IA32_BIOS_SIGN_ID). If no update is present in the + * processor, the value in the MSR remains unmodified. + * + * Use native_cpuid -- this code runs very early and we don't + * want to mess with paravirt. + */ + unsigned int eax = 1, ebx, ecx = 0, edx; + + native_cpuid(&eax, &ebx, &ecx, &edx); +} + static int collect_cpu_info_early(struct ucode_cpu_info *uci) { unsigned int val[2]; @@ -393,7 +413,7 @@ static int collect_cpu_info_early(struct ucode_cpu_info *uci) native_wrmsrl(MSR_IA32_UCODE_REV, 0); /* As documented in the SDM: Do a CPUID 1 here */ - sync_core(); + cpuid_1(); /* get the current revision from MSR 0x8B */ native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]); @@ -593,7 +613,7 @@ static int apply_microcode_early(struct ucode_cpu_info *uci, bool early) native_wrmsrl(MSR_IA32_UCODE_REV, 0); /* As documented in the SDM: Do a CPUID 1 here */ - sync_core(); + cpuid_1(); /* get the current revision from MSR 0x8B */ native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]); @@ -805,7 +825,7 @@ static int apply_microcode_intel(int cpu) wrmsrl(MSR_IA32_UCODE_REV, 0); /* As documented in the SDM: Do a CPUID 1 here */ - sync_core(); + cpuid_1(); /* get the current revision from MSR 0x8B */ rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);