Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758762AbcLTUXf (ORCPT ); Tue, 20 Dec 2016 15:23:35 -0500 Received: from vern.gendns.com ([206.190.152.46]:55225 "EHLO vern.gendns.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752252AbcLTUXV (ORCPT ); Tue, 20 Dec 2016 15:23:21 -0500 From: David Lechner To: Greg Kroah-Hartman , Rob Herring , Mark Rutland Cc: David Lechner , Sekhar Nori , Kevin Hilman , Axel Haslam , Alexandre Bailon , Bartosz Golaszewski , Jiri Slaby , linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/3] ARM: da850: Add ti,da830-uart compatible for serial ports Date: Tue, 20 Dec 2016 14:23:04 -0600 Message-Id: <1482265384-715-4-git-send-email-david@lechnology.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1482265384-715-1-git-send-email-david@lechnology.com> References: <1482265384-715-1-git-send-email-david@lechnology.com> X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1506 Lines: 49 TI DA8xx/OMAPL13x/AM17xx/AM18xx SoCs have extra UART registers beyond the standard 8250 registers, so we need a new compatible string to indicate this. Also, at least one of these registers uses the full 32 bits, so we need to specify reg-io-width in addition to reg-shift. "ns16550a" is left in the compatible specification since it does work as long as the bootloader configures the SoC UART power management registers. Signed-off-by: David Lechner --- arch/arm/boot/dts/da850.dtsi | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi index 104155d..f6cd212 100644 --- a/arch/arm/boot/dts/da850.dtsi +++ b/arch/arm/boot/dts/da850.dtsi @@ -266,22 +266,25 @@ interrupt-names = "edm3_tcerrint"; }; serial0: serial@42000 { - compatible = "ns16550a"; + compatible = "ti,da830-uart", "ns16550a"; reg = <0x42000 0x100>; + reg-io-width = <4>; reg-shift = <2>; interrupts = <25>; status = "disabled"; }; serial1: serial@10c000 { - compatible = "ns16550a"; + compatible = "ti,da830-uart", "ns16550a"; reg = <0x10c000 0x100>; + reg-io-width = <4>; reg-shift = <2>; interrupts = <53>; status = "disabled"; }; serial2: serial@10d000 { - compatible = "ns16550a"; + compatible = "ti,da830-uart", "ns16550a"; reg = <0x10d000 0x100>; + reg-io-width = <4>; reg-shift = <2>; interrupts = <61>; status = "disabled"; -- 2.7.4