Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758731AbcLXB7B (ORCPT ); Fri, 23 Dec 2016 20:59:01 -0500 Received: from mail-ua0-f180.google.com ([209.85.217.180]:36695 "EHLO mail-ua0-f180.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753006AbcLXB67 (ORCPT ); Fri, 23 Dec 2016 20:58:59 -0500 MIME-Version: 1.0 In-Reply-To: <20161224013745.108716-3-ricardo.neri-calderon@linux.intel.com> References: <20161224013745.108716-1-ricardo.neri-calderon@linux.intel.com> <20161224013745.108716-3-ricardo.neri-calderon@linux.intel.com> From: Andy Lutomirski Date: Fri, 23 Dec 2016 17:58:36 -0800 Message-ID: Subject: Re: [v2 2/7] x86/mpx: Fail when implicit zero-displacement is used along with R/EBP To: Ricardo Neri Cc: Ingo Molnar , Thomas Gleixner , Borislav Petkov , Andy Lutomirski , Peter Zijlstra , "linux-kernel@vger.kernel.org" , X86 ML , linux-msdos@vger.kernel.org, wine-devel@winehq.org, Dave Hansen , Adam Buchbinder , Colin Ian King , Lorenzo Stoakes , Qiaowei Ren , "Ravi V . Shankar" Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1770 Lines: 40 On Fri, Dec 23, 2016 at 5:37 PM, Ricardo Neri wrote: > Section 2.2.1.2 of the Intel 64 and IA-32 Architectures Software > Developer's Manual volume 2A states that when memory addressing with no > explicit displacement (i.e, mod part of ModR/M is 0), a SIB byte is used > and the base of the SIB byte points to (R/EBP) (i.e., base = 5), an > explicit displacement of 0 must be used. > > Make the address decoder to return -EINVAL in such a case. > > Cc: Dave Hansen > Cc: Adam Buchbinder > Cc: Colin Ian King > Cc: Lorenzo Stoakes > Cc: Qiaowei Ren > Cc: Ravi V. Shankar > Cc: x86@kernel.org > Signed-off-by: Ricardo Neri > --- > arch/x86/mm/mpx.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/x86/mm/mpx.c b/arch/x86/mm/mpx.c > index 6a75a75..71681d0 100644 > --- a/arch/x86/mm/mpx.c > +++ b/arch/x86/mm/mpx.c > @@ -120,6 +120,13 @@ static int get_reg_offset(struct insn *insn, struct pt_regs *regs, > > case REG_TYPE_BASE: > regno = X86_SIB_BASE(insn->sib.value); > + if (regno == 5 && X86_MODRM_RM(insn->modrm.value) == 0) { > + WARN_ONCE(1, "An explicit displacement is required when %sBP used as SIB base.", > + (IS_ENABLED(CONFIG_X86_64) && insn->x86_64) ? > + "R13 or R" : "E"); > + return -EINVAL; > + } > + Now that I've read the cover letter, I see what's going on. This should not warn -- user code can easily trigger this deliberately.