Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753146AbcL0Jof (ORCPT ); Tue, 27 Dec 2016 04:44:35 -0500 Received: from mail-dm3nam03on0054.outbound.protection.outlook.com ([104.47.41.54]:27898 "EHLO NAM03-DM3-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752225AbcL0Jo0 (ORCPT ); Tue, 27 Dec 2016 04:44:26 -0500 X-Greylist: delayed 1992 seconds by postgrey-1.27 at vger.kernel.org; Tue, 27 Dec 2016 04:44:26 EST Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=nxp.com; nxp.com; dkim=none (message not signed) header.d=none;nxp.com; dmarc=fail action=none header.from=nxp.com;nxp.com; dkim=none (message not signed) header.d=none; From: Minghuan Lian To: , , CC: Marc Zyngier , Rob Herring , Jason Cooper , Roy Zang , Mingkai Hu , Stuart Yoder , Yang-Leo Li , Scott Wood , Minghuan Lian Subject: [PATCH 6/9] arm64: dts: ls1046a: add MSI dts node Date: Tue, 27 Dec 2016 17:13:02 +0800 Message-ID: <1482829985-24421-6-git-send-email-Minghuan.Lian@nxp.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1482829985-24421-1-git-send-email-Minghuan.Lian@nxp.com> References: <1482829985-24421-1-git-send-email-Minghuan.Lian@nxp.com> X-EOPAttributedMessage: 0 X-Matching-Connectors: 131273034703007265;(91ab9b29-cfa4-454e-5278-08d120cd25b8);() X-Forefront-Antispam-Report: CIP:192.88.168.50;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(6009001)(7916002)(336005)(39410400002)(39400400002)(39850400002)(39380400002)(39860400002)(39450400003)(39840400002)(2980300002)(1110001)(1109001)(339900001)(189002)(199003)(2906002)(50986999)(4326007)(106466001)(76176999)(38730400001)(105606002)(92566002)(47776003)(2950100002)(50226002)(77096006)(5660300001)(8656002)(626004)(356003)(7416002)(5003940100001)(50466002)(48376002)(8936002)(97736004)(5001770100001)(305945005)(85426001)(189998001)(2201001)(81166006)(81156014)(86362001)(36756003)(104016004)(8676002)(68736007)(7059030)(2101003);DIR:OUT;SFP:1101;SCL:1;SRVR:MWHPR03MB2479;H:tx30smr01.am.freescale.net;FPR:;SPF:Fail;PTR:InfoDomainNonexistent;MX:1;A:1;LANG:en; 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Each controller supports 128 interrupts. Signed-off-by: Minghuan Lian --- .../interrupt-controller/fsl,ls-scfg-msi.txt | 1 + arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 31 ++++++++++++++++++++++ 2 files changed, 32 insertions(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-scfg-msi.txt b/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-scfg-msi.txt index 2755cd1..54597b0 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-scfg-msi.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-scfg-msi.txt @@ -6,6 +6,7 @@ Required properties: Layerscape PCIe MSI controller block such as: "fsl,ls1021a-msi" "fsl,ls1043a-msi" + "fsl,ls1046a-msi" - msi-controller: indicates that this is a PCIe MSI controller node - reg: physical base address of the controller and length of memory mapped. - interrupts: an interrupt to the parent interrupt controller. diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index 38806ca..49dbafc 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -511,5 +511,36 @@ interrupts = ; clocks = <&clockgen 4 1>; }; + + msi1: msi-controller@1580000 { + compatible = "fsl,ls1046a-msi"; + msi-controller; + reg = <0x0 0x1580000 0x0 0x10000>; + interrupts = , + , + , + ; + }; + + msi2: msi-controller@1590000 { + compatible = "fsl,ls1046a-msi"; + msi-controller; + reg = <0x0 0x1590000 0x0 0x10000>; + interrupts = , + , + , + ; + }; + + msi3: msi-controller@15a0000 { + compatible = "fsl,ls1046a-msi"; + msi-controller; + reg = <0x0 0x15a0000 0x0 0x10000>; + interrupts = , + , + , + ; + }; + }; }; -- 1.9.1