Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753541AbdCAX0d (ORCPT ); Wed, 1 Mar 2017 18:26:33 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:33894 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751897AbdCAX0c (ORCPT ); Wed, 1 Mar 2017 18:26:32 -0500 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 7F555607E5 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sboyd@codeaurora.org Date: Wed, 1 Mar 2017 11:11:19 -0800 From: Stephen Boyd To: Neil Armstrong Cc: khilman@baylibre.com, carlo@caione.org, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 2/3] clk: meson-gxbb: Add MALI clocks Message-ID: <20170301191119.GR25384@codeaurora.org> References: <1488365164-22861-1-git-send-email-narmstrong@baylibre.com> <1488365164-22861-3-git-send-email-narmstrong@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1488365164-22861-3-git-send-email-narmstrong@baylibre.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1556 Lines: 65 On 03/01, Neil Armstrong wrote: > diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c > index a52063f..31f6090 100644 > --- a/drivers/clk/meson/gxbb.c > +++ b/drivers/clk/meson/gxbb.c > @@ -634,6 +634,131 @@ > }, > }; > > +/* > + * The MALI IP is clocked by two identical clocks (mali_0 and mali_1) > + * muxed by a glitch-free switch. > + */ > + > +static u32 mux_table_mali_0_1[] = {0, 1, 2, 3, 4, 5, 6, 7}; > +const char *gxbb_mali_0_1_parent_names[] = { static? > + "xtal", "gp0_pll", "mpll2", "mpll1", "fclk_div7", > + "fclk_div4", "fclk_div3", "fclk_div5" > +}; > + [..] > + .reg = (void *)HHI_MALI_CLK_CNTL, > + .bit_idx = 24, > + .lock = &clk_lock, > + .hw.init = &(struct clk_init_data){ > + .name = "mali_1", > + .ops = &clk_gate_ops, > + .parent_names = (const char *[]){ "mali_1_div" }, > + .num_parents = 1, > + .flags = (CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED), > + }, > +}; > + > +static u32 mux_table_mali[] = {0, 1}; > +const char *gxbb_mali_parent_names[] = { static? > + "mali_0", "mali_1" > +}; [...] > static struct clk_mux *gxbb_clk_muxes[] = { > &gxbb_mpeg_clk_sel, > &gxbb_sar_adc_clk_sel, > + &gxbb_mali_0_sel, > + &gxbb_mali_1_sel, > + &gxbb_mali, > }; > > static struct clk_divider *gxbb_clk_dividers[] = { Can these arrays be const? If so, please do that in a separate patch. > &gxbb_mpeg_clk_div, > &gxbb_sar_adc_clk_div, > + &gxbb_mali_0_div, > + &gxbb_mali_1_div, > }; -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project