Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753507AbdCAXu7 (ORCPT ); Wed, 1 Mar 2017 18:50:59 -0500 Received: from mail-qk0-f175.google.com ([209.85.220.175]:35252 "EHLO mail-qk0-f175.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751955AbdCAXux (ORCPT ); Wed, 1 Mar 2017 18:50:53 -0500 MIME-Version: 1.0 In-Reply-To: <311f77708f362c1af0a999ba5ebbbc062fdc5601.1488345270.git.len.brown@intel.com> References: <678a3bd1b3de6d2ebf604e7d708bc8150bb667e9.1488345270.git.len.brown@intel.com> <20170301052748.27810-1-lenb@kernel.org> <311f77708f362c1af0a999ba5ebbbc062fdc5601.1488345270.git.len.brown@intel.com> From: Andy Shevchenko Date: Thu, 2 Mar 2017 01:48:00 +0200 Message-ID: Subject: Re: [PATCH 24/44] x86: intel-family.h: Add GEMINI_LAKE SOC To: Len Brown Cc: "linux-pm@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Len Brown , "x86@kernel.org" Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 595 Lines: 17 On Wed, Mar 1, 2017 at 7:27 AM, Len Brown wrote: > From: Len Brown > --- a/arch/x86/include/asm/intel-family.h > +++ b/arch/x86/include/asm/intel-family.h > @@ -59,6 +59,7 @@ > #define INTEL_FAM6_ATOM_MERRIFIELD 0x4A /* Tangier */ > #define INTEL_FAM6_ATOM_MOOREFIELD 0x5A /* Anniedale */ > #define INTEL_FAM6_ATOM_GOLDMONT 0x5C > +#define INTEL_FAM6_ATOM_GEMINI_LAKE 0x7A > #define INTEL_FAM6_ATOM_DENVERTON 0x5F /* Goldmont Microserver */ One nit: can we keep it in order by model ID? -- With Best Regards, Andy Shevchenko