Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752102AbdCCUlN (ORCPT ); Fri, 3 Mar 2017 15:41:13 -0500 Received: from mail-sn1nam01on0125.outbound.protection.outlook.com ([104.47.32.125]:19323 "EHLO NAM01-SN1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751869AbdCCUlM (ORCPT ); Fri, 3 Mar 2017 15:41:12 -0500 Authentication-Results: gmail.com; dkim=none (message not signed) header.d=none;gmail.com; dmarc=none action=none header.from=maximintegrated.com; From: Ryan Lee To: , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH 06/10] Added mask variable to apply it in one round after the switch Date: Fri, 3 Mar 2017 23:52:44 +0900 Message-ID: <1488552768-14901-7-git-send-email-ryans.lee@maximintegrated.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1488552768-14901-1-git-send-email-ryans.lee@maximintegrated.com> References: <1488552768-14901-1-git-send-email-ryans.lee@maximintegrated.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [222.234.201.146] X-ClientProxiedBy: KL1PR02CA0031.apcprd02.prod.outlook.com (10.165.15.41) To CY4PR11MB1367.namprd11.prod.outlook.com (10.173.16.149) X-MS-Office365-Filtering-Correlation-Id: 64e1eb39-35af-417d-c4b8-08d46245298e X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:(22001)(48565401081);SRVR:CY4PR11MB1367; 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struct max98927_priv *max98927 = snd_soc_codec_get_drvdata(codec); + unsigned int mode = 0; unsigned int invert = 0; dev_dbg(codec->dev, "%s: fmt 0x%08X\n", __func__, fmt); switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { case SND_SOC_DAIFMT_CBS_CFS: - regmap_update_bits(max98927->regmap, - MAX98927_R0021_PCM_MASTER_MODE, - MAX98927_PCM_MASTER_MODE_MASK, - MAX98927_PCM_MASTER_MODE_SLAVE); + mode = MAX98927_PCM_MASTER_MODE_SLAVE; break; case SND_SOC_DAIFMT_CBM_CFM: max98927->master = true; - regmap_update_bits(max98927->regmap, - MAX98927_R0021_PCM_MASTER_MODE, - MAX98927_PCM_MASTER_MODE_MASK, - MAX98927_PCM_MASTER_MODE_MASTER); + mode = MAX98927_PCM_MASTER_MODE_MASTER; break; case SND_SOC_DAIFMT_CBS_CFM: - regmap_update_bits(max98927->regmap, - MAX98927_R0021_PCM_MASTER_MODE, - MAX98927_PCM_MASTER_MODE_MASK, - MAX98927_PCM_MASTER_MODE_HYBRID); + mode = MAX98927_PCM_MASTER_MODE_HYBRID; default: dev_err(codec->dev, "DAI clock mode unsupported"); return -EINVAL; } + regmap_update_bits(max98927->regmap, + MAX98927_R0021_PCM_MASTER_MODE, + MAX98927_PCM_MASTER_MODE_MASK, + mode); + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { case SND_SOC_DAIFMT_NB_NF: break; @@ -210,24 +207,28 @@ static int max98927_dai_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) return -EINVAL; } + regmap_update_bits(max98927->regmap, + MAX98927_R0020_PCM_MODE_CFG, + MAX98927_PCM_MODE_CFG_PCM_BCLKEDGE, + invert); + /* interface format */ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { case SND_SOC_DAIFMT_I2S: max98927->iface |= SND_SOC_DAIFMT_I2S; - regmap_update_bits(max98927->regmap, - MAX98927_R0020_PCM_MODE_CFG, - max98927->iface, max98927->iface); - break; + + break; case SND_SOC_DAIFMT_LEFT_J: max98927->iface |= SND_SOC_DAIFMT_LEFT_J; - regmap_update_bits(max98927->regmap, - MAX98927_R0020_PCM_MODE_CFG, - max98927->iface, max98927->iface); - break; + break; default: return -EINVAL; } + regmap_update_bits(max98927->regmap, + MAX98927_R0020_PCM_MODE_CFG, + max98927->iface, max98927->iface); + /* pcm channel configuration */ if (max98927->iface & (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J)) { regmap_write(max98927->regmap, @@ -301,29 +302,21 @@ static int max98927_dai_hw_params(struct snd_pcm_substream *substream, { struct snd_soc_codec *codec = dai->codec; struct max98927_priv *max98927 = snd_soc_codec_get_drvdata(codec); - int sampling_rate = 0; + unsigned int sampling_rate = 0; + unsigned int chan_sz = 0; /* pcm mode configuration */ switch (snd_pcm_format_width(params_format(params))) { case 16: - regmap_update_bits(max98927->regmap, - MAX98927_R0020_PCM_MODE_CFG, - MAX98927_PCM_MODE_CFG_CHANSZ_16, - MAX98927_PCM_MODE_CFG_CHANSZ_16); + chan_sz = MAX98927_PCM_MODE_CFG_CHANSZ_16; max98927->ch_size = 16; break; case 24: - regmap_update_bits(max98927->regmap, - MAX98927_R0020_PCM_MODE_CFG, - MAX98927_PCM_MODE_CFG_CHANSZ_24, - MAX98927_PCM_MODE_CFG_CHANSZ_24); + chan_sz = MAX98927_PCM_MODE_CFG_CHANSZ_24; max98927->ch_size = 24; break; case 32: - regmap_update_bits(max98927->regmap, - MAX98927_R0020_PCM_MODE_CFG, - MAX98927_PCM_MODE_CFG_CHANSZ_32, - MAX98927_PCM_MODE_CFG_CHANSZ_32); + chan_sz = MAX98927_PCM_MODE_CFG_CHANSZ_32; max98927->ch_size = 32; break; default: @@ -331,6 +324,11 @@ static int max98927_dai_hw_params(struct snd_pcm_substream *substream, params_format(params)); goto err; } + + regmap_update_bits(max98927->regmap, + MAX98927_R0020_PCM_MODE_CFG, + MAX98927_PCM_MODE_CFG_CHANSZ_MASK, chan_sz); + dev_dbg(codec->dev, "format supported %d", params_format(params)); -- 2.7.4