Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753628AbdCFKBx (ORCPT ); Mon, 6 Mar 2017 05:01:53 -0500 Received: from hqemgate15.nvidia.com ([216.228.121.64]:14724 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752713AbdCFKBb (ORCPT ); Mon, 6 Mar 2017 05:01:31 -0500 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Mon, 06 Mar 2017 01:56:55 -0800 Subject: Re: [PATCH] clk: tegra: mark TEGRA210_CLK_DBGAPB as always on To: Peter De Schrijver References: <1488295191-24038-1-git-send-email-pdeschrijver@nvidia.com> <4cf40c25-2ce9-737c-9ccb-06bc2cdb61d7@nvidia.com> <20170306083835.GF26640@tbergstrom-lnx.Nvidia.com> CC: Prashant Gaikwad , Michael Turquette , Stephen Boyd , "Stephen Warren" , Thierry Reding , Alexandre Courbot , , , From: Jon Hunter Message-ID: <6d4dd315-cab6-189d-f383-fb7523fc31bd@nvidia.com> Date: Mon, 6 Mar 2017 09:58:29 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.7.0 MIME-Version: 1.0 In-Reply-To: <20170306083835.GF26640@tbergstrom-lnx.Nvidia.com> X-Originating-IP: [10.26.11.217] X-ClientProxiedBy: UKMAIL102.nvidia.com (10.26.138.15) To UKMAIL101.nvidia.com (10.26.138.13) Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1426 Lines: 38 On 06/03/17 08:38, Peter De Schrijver wrote: > On Thu, Mar 02, 2017 at 05:56:49PM +0000, Jon Hunter wrote: >> >> On 28/02/17 15:19, Peter De Schrijver wrote: >>> This is needed to make the JTAG debugging interface work. >>> >>> Signed-off-by: Peter De Schrijver >>> --- >>> drivers/clk/tegra/clk-tegra210.c | 1 + >>> 1 file changed, 1 insertion(+) >>> >>> diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c >>> index 9a2512a..708f5f1 100644 >>> --- a/drivers/clk/tegra/clk-tegra210.c >>> +++ b/drivers/clk/tegra/clk-tegra210.c >>> @@ -2680,6 +2680,7 @@ static void tegra210_cpu_clock_resume(void) >>> { TEGRA210_CLK_EMC, TEGRA210_CLK_CLK_MAX, 0, 1 }, >>> { TEGRA210_CLK_MSELECT, TEGRA210_CLK_CLK_MAX, 0, 1 }, >>> { TEGRA210_CLK_CSITE, TEGRA210_CLK_CLK_MAX, 0, 1 }, >>> + { TEGRA210_CLK_DBGAPB, TEGRA210_CLK_CLK_MAX, 0, 1 }, >>> { TEGRA210_CLK_TSENSOR, TEGRA210_CLK_CLK_M, 400000, 0 }, >>> { TEGRA210_CLK_I2C1, TEGRA210_CLK_PLL_P, 0, 0 }, >>> { TEGRA210_CLK_I2C2, TEGRA210_CLK_PLL_P, 0, 0 }, >> >> Should there be some dependency on say CONFIG_DEBUG_KERNEL? I am not >> sure we always want this on for all cases. > > Why would you not want it to be always on? Purely for power reasons. I do not know how much power keeping this clock running consumes, but I don't like the idea of clocks running all the time when they are not needed. Jon -- nvpublic