Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754905AbdCGItp (ORCPT ); Tue, 7 Mar 2017 03:49:45 -0500 Received: from mailout4.w1.samsung.com ([210.118.77.14]:59589 "EHLO mailout4.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754769AbdCGItR (ORCPT ); Tue, 7 Mar 2017 03:49:17 -0500 X-AuditID: cbfec7f5-f79d06d000004445-cc-58be73dc8c0f Subject: Re: [Patch v2 09/11] v4l2: Add v4l2 control IDs for HEVC encoder To: Smitha T Murthy , linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org Cc: kyungmin.park@samsung.com, kamil@wypas.org, jtp.park@samsung.com, mchehab@kernel.org, pankaj.dubey@samsung.com, krzk@kernel.org, m.szyprowski@samsung.com, s.nawrocki@samsung.com From: Andrzej Hajda Message-id: <0b93b507-ae3b-f580-7c31-ddf814e0f27b@samsung.com> Date: Tue, 07 Mar 2017 09:48:26 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.7.0 MIME-version: 1.0 In-reply-to: <1488532036-13044-10-git-send-email-smitha.t@samsung.com> Content-type: text/plain; charset=windows-1252 Content-transfer-encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrDKsWRmVeSWpSXmKPExsWy7djP87p3ivdFGJxapWFxZO1VJouZJ9pZ Lc6f38BucbbpDbvFpsfXWC0u75rDZtGzYSurxdojd9ktlm36w2SxaOsXdovDb4CK7+7ZxujA 47FpVSebx+Yl9R59W1YxenzeJOdx5UgjewBrFJdNSmpOZllqkb5dAlfGvy/fWAqeplR8XTCH rYHxRXAXIyeHhICJxLElNxkhbDGJC/fWs3UxcnEICSxllHi/ZT+U85lRYt2+fiaYjvnrPrJA JJYxSnyavZIZwnnGKNF5pZEFpEpYwFNi7qKlYAkRgX5GiV1bbzGDJJgFdjJKNJ+oBLHZBDQl /m6+yQZi8wrYSVyftpYVxGYRUJU40XsRbJCoQITEjhs9UDWCEj8m3wOLcwq4Sbxd+5kRYqaB xIwph5kgbHmJzWvegi2WEDjHLnHu2X2gBAeQIyux6QAzxAsuEiemvYN6Wlji1fEt7BC2jERn x0EmiN5uoNf6T7BDOFMYJf59mAHVbS1x+PhFVohtfBKTtk1nhljAK9HRJgRR4iExf/t6qHJH iSs/d0CD6AqjxNzHs5gnMMrPQvLQLCRPzELyxAJG5lWMIqmlxbnpqcWmesWJucWleel6yfm5 mxiBaej0v+NfdzAuPWZ1iFGAg1GJhzche2+EEGtiWXFl7iFGCQ5mJRHePVn7IoR4UxIrq1KL 8uOLSnNSiw8xSnOwKInz7llwJVxIID2xJDU7NbUgtQgmy8TBKdXAeDniSPKpUmGp9GA53hvs dtlzzWQFrau2BR1dEyhp8EK+PUpvx1yjkNreJCWV1Tsd1Wz/v9kZKjJ1d1MWe/nmoHupuvLN F34J7c9I3xj4Z97cR16XHc1NfE/clWrnPHvQf93ymSml35nncHJzlyn/vbxnn3j1Ocenl/KO 7qxb1fxnke+n6RZJSizFGYmGWsxFxYkA/IrC2z8DAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrFIsWRmVeSWpSXmKPExsVy+t/xK7rWJfsiDP7OM7A4svYqk8XME+2s FufPb2C3ONv0ht1i0+NrrBaXd81hs+jZsJXVYu2Ru+wWyzb9YbJYtPULu8XhN0DFd/dsY3Tg 8di0qpPNY/OSeo++LasYPT5vkvO4cqSRPYA1ys0mIzUxJbVIITUvOT8lMy/dVik0xE3XQkkh LzE31VYpQtc3JEhJoSwxpxTIMzJAAw7OAe7BSvp2CW4Z/758Yyl4mlLxdcEctgbGF8FdjJwc EgImEvPXfWSBsMUkLtxbz9bFyMUhJLCEUWLGpovsEM4zRoldzS/AqoQFPCXmLlrKDJIQEehn lDjwvh2q6gqjxM4HR8D6mQV2MkrcPTAfrIVNQFPi7+abbCA2r4CdxPVpa1lBbBYBVYkTvRfB akQFIiTmP13FBFEjKPFj8j2wOKeAm8TbtZ8Zuxg5gIbqSdy/qAUSZhaQl9i85i3zBEaBWUg6 ZiFUzUJStYCReRWjSGppcW56brGhXnFibnFpXrpecn7uJkZgPG479nPzDsZLG4MPMQpwMCrx 8O7I3RshxJpYVlyZe4hRgoNZSYR3T9a+CCHelMTKqtSi/Pii0pzU4kOMpkAvTGSWEk3OB6aK vJJ4QxNDc0tDI2MLC3MjIyVx3pIPV8KFBNITS1KzU1MLUotg+pg4OKUaGC1eM0fkGn+4G8Gx sU87amWK98Ql/z7smu2yQXArU4/88id3dx79tWD6hE1ltgF7Tc9HWousNfO5MuvlXauwvS++ it/dZr2Gz9ar2zDmhduurZtOfbI/WtteZcRi8XGJm8quHa6/Tn9Uvx/R1bbiPr/tA6tLJ6bq mzn2Zf0wijziszTdOWGvzCslluKMREMt5qLiRAAGBhza3QIAAA== X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170307084828eucas1p27e7d2c927ca9dddbc1de835a67efd5db X-Msg-Generator: CA X-Sender-IP: 182.198.249.179 X-Local-Sender: =?UTF-8?B?QW5kcnplaiBIYWpkYRtTUlBPTC1LZXJuZWwgKFRQKRvsgrw=?= =?UTF-8?B?7ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?UTF-8?B?QW5kcnplaiBIYWpkYRtTUlBPTC1LZXJuZWwgKFRQKRtTYW1z?= =?UTF-8?B?dW5nIEVsZWN0cm9uaWNzG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Sender-Code: =?UTF-8?B?QzEwG0VIURtDMTBDRDAyQ0QwMjczOTI=?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20170303090508epcas1p2ff5f5849d680c3558c564e77444fce53 X-RootMTR: 20170303090508epcas1p2ff5f5849d680c3558c564e77444fce53 References: <1488532036-13044-1-git-send-email-smitha.t@samsung.com> <1488532036-13044-10-git-send-email-smitha.t@samsung.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 12677 Lines: 223 On 03.03.2017 10:07, Smitha T Murthy wrote: > Add v4l2 controls for HEVC encoder > > Signed-off-by: Smitha T Murthy > --- > drivers/media/v4l2-core/v4l2-ctrls.c | 51 +++++++++++++ > include/uapi/linux/v4l2-controls.h | 129 ++++++++++++++++++++++++++++++++++ > 2 files changed, 180 insertions(+), 0 deletions(-) > > diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c > index 47001e2..b3ec7a3 100644 > --- a/drivers/media/v4l2-core/v4l2-ctrls.c > +++ b/drivers/media/v4l2-core/v4l2-ctrls.c > @@ -775,6 +775,57 @@ static bool is_new_manual(const struct v4l2_ctrl *master) > case V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP: return "VPX P-Frame QP Value"; > case V4L2_CID_MPEG_VIDEO_VPX_PROFILE: return "VPX Profile"; > > + /* HEVC controls */ > + case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP: return "HEVC I frame QP value"; > + case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP: return "HEVC P frame QP value"; > + case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP: return "HEVC B frame QP value"; > + case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP: return "HEVC Minimum QP value"; > + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP: return "HEVC Maximum QP value"; > + case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK: return "HEVC Dark region adaptive"; > + case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH: return "HEVC Smooth region adaptive"; > + case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC: return "HEVC Static region adaptive"; > + case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY: return "HEVC Region adaptive rate control"; > + case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE: return "HEVC Profile"; > + case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL: return "HEVC Level"; > + case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG: return "HEVC tier_flag default is Main"; > + case V4L2_CID_MPEG_VIDEO_HEVC_RC_FRAME_RATE: return "HEVC Frame rate"; > + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH: return "HEVC Maximum coding unit depth"; > + case V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES: return "HEVC Number of reference frames for P Frames"; > + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE: return "HEVC Refresh type"; > + case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED_ENABLE: return "HEVC Constant intra prediction enable"; > + case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU_ENABLE: return "HEVC Lossless encoding enable"; > + case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT_ENABLE: return "HEVC Wavefront enable"; > + case V4L2_CID_MPEG_VIDEO_HEVC_LF_DISABLE: return "HEVC Loop filter disable"; > + case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY: return "HEVC Loop filtering across slice boundary or not"; > + case V4L2_CID_MPEG_VIDEO_HEVC_LTR_ENABLE: return "HEVC long term reference enable"; > + case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP_ENABLE: return "HEVC QP values for temporal layer"; > + case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE: return "HEVC Hierarchical Coding Type"; > + case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER:return "HEVC Hierarchical Coding Layer"; > + case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP:return "HEVC Hierarchical Coding Layer QP"; > + case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT0:return "HEVC Hierarchical Coding Layer BIT0"; > + case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT1:return "HEVC Hierarchical Coding Layer BIT1"; > + case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT2:return "HEVC Hierarchical Coding Layer BIT2"; > + case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT3:return "HEVC Hierarchical Coding Layer BIT3"; > + case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT4:return "HEVC Hierarchical Coding Layer BIT4"; > + case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT5:return "HEVC Hierarchical Coding Layer BIT5"; > + case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT6:return "HEVC Hierarchical Coding Layer BIT6"; > + case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH:return "HEVC Hierarchical Coding Layer Change"; > + case V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING: return "HEVC Sign data hiding"; > + case V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB_ENABLE: return "HEVC General pb enable"; > + case V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID_ENABLE: return "HEVC Temporal id enable"; > + case V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOTHING_FLAG: return "HEVC Strong intra smoothing flag"; > + case V4L2_CID_MPEG_VIDEO_HEVC_DISABLE_INTRA_PU_SPLIT: return "HEVC Disable intra pu split"; > + case V4L2_CID_MPEG_VIDEO_HEVC_DISABLE_TMV_PREDICTION: return "HEVC Disable tmv prediction"; > + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1: return "HEVC Max number of candidate MVs"; > + case V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE_ENABLE: return "HEVC ENC without startcode enable"; > + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD: return "HEVC Number of reference picture"; > + case V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2: return "HEVC Loop filter beta offset"; > + case V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2: return "HEVC Loop filter tc offset"; > + case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD: return "HEVC Size of length field"; > + case V4L2_CID_MPEG_VIDEO_HEVC_USE_REF: return "HEVC User long term reference frame"; s/User/Use/ As I said previously I am not HEVC expert, it would be good if someone with better skills look at it. >From my side after fixing typo above you can add: Reviewed-by: Andrzej Hajda Regards Andrzej > + case V4L2_CID_MPEG_VIDEO_HEVC_STORE_REF: return "HEVC Store long term reference frame"; > + case V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR: return "HEVC Prepend SPS/PPS to every IDR"; > + > /* CAMERA controls */ > /* Keep the order of the 'case's the same as in v4l2-controls.h! */ > case V4L2_CID_CAMERA_CLASS: return "Camera Controls"; > diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h > index 0d2e1e0..11a13c3 100644 > --- a/include/uapi/linux/v4l2-controls.h > +++ b/include/uapi/linux/v4l2-controls.h > @@ -579,6 +579,135 @@ enum v4l2_vp8_golden_frame_sel { > #define V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP (V4L2_CID_MPEG_BASE+510) > #define V4L2_CID_MPEG_VIDEO_VPX_PROFILE (V4L2_CID_MPEG_BASE+511) > > +/* CIDs for HEVC encoding. Number gaps are for compatibility */ > + > +#define V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP \ > + (V4L2_CID_MPEG_BASE + 512) > +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP \ > + (V4L2_CID_MPEG_BASE + 513) > +#define V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP \ > + (V4L2_CID_MPEG_BASE + 514) > +#define V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP \ > + (V4L2_CID_MPEG_BASE + 515) > +#define V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP \ > + (V4L2_CID_MPEG_BASE + 516) > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP_ENABLE \ > + (V4L2_CID_MPEG_BASE + 517) > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE \ > + (V4L2_CID_MPEG_BASE + 518) > +enum v4l2_mpeg_video_hevc_hier_coding_type { > + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B = 0, > + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P = 1, > +}; > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER \ > + (V4L2_CID_MPEG_BASE + 519) > +enum v4l2_mpeg_video_hevc_hierarchial_coding_layer { > + V4L2_MPEG_VIDEO_HEVC_HIERARCHIAL_CODING_LAYER0 = 0, > + V4L2_MPEG_VIDEO_HEVC_HIERARCHIAL_CODING_LAYER1 = 1, > + V4L2_MPEG_VIDEO_HEVC_HIERARCHIAL_CODING_LAYER2 = 2, > + V4L2_MPEG_VIDEO_HEVC_HIERARCHIAL_CODING_LAYER3 = 3, > + V4L2_MPEG_VIDEO_HEVC_HIERARCHIAL_CODING_LAYER4 = 4, > + V4L2_MPEG_VIDEO_HEVC_HIERARCHIAL_CODING_LAYER5 = 5, > + V4L2_MPEG_VIDEO_HEVC_HIERARCHIAL_CODING_LAYER6 = 6, > +}; > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP \ > + (V4L2_CID_MPEG_BASE + 520) > +#define V4L2_CID_MPEG_VIDEO_HEVC_PROFILE \ > + (V4L2_CID_MPEG_BASE + 521) > +#define V4L2_CID_MPEG_VIDEO_HEVC_LEVEL \ > + (V4L2_CID_MPEG_BASE + 522) > +#define V4L2_CID_MPEG_VIDEO_HEVC_RC_FRAME_RATE \ > + (V4L2_CID_MPEG_BASE + 523) > +#define V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG \ > + (V4L2_CID_MPEG_BASE + 524) > +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH \ > + (V4L2_CID_MPEG_BASE + 525) > +#define V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES \ > + (V4L2_CID_MPEG_BASE + 526) > +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_DISABLE \ > + (V4L2_CID_MPEG_BASE + 527) > +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY \ > + (V4L2_CID_MPEG_BASE + 528) > +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2 \ > + (V4L2_CID_MPEG_BASE + 529) > +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2 \ > + (V4L2_CID_MPEG_BASE + 530) > +#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE \ > + (V4L2_CID_MPEG_BASE + 531) > +enum v4l2_cid_mpeg_video_hevc_refresh_type { > + V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE = 0, > + V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA = 1, > + V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR = 2, > +}; > +#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD \ > + (V4L2_CID_MPEG_BASE + 532) > +#define V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU_ENABLE \ > + (V4L2_CID_MPEG_BASE + 533) > +#define V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED_ENABLE \ > + (V4L2_CID_MPEG_BASE + 534) > +#define V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT_ENABLE \ > + (V4L2_CID_MPEG_BASE + 535) > +#define V4L2_CID_MPEG_VIDEO_HEVC_LTR_ENABLE \ > + (V4L2_CID_MPEG_BASE + 536) > +#define V4L2_CID_MPEG_VIDEO_HEVC_USE_REF \ > + (V4L2_CID_MPEG_BASE + 537) > +#define V4L2_CID_MPEG_VIDEO_HEVC_STORE_REF \ > + (V4L2_CID_MPEG_BASE + 538) > +#define V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING \ > + (V4L2_CID_MPEG_BASE + 539) > +#define V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB_ENABLE \ > + (V4L2_CID_MPEG_BASE + 540) > +#define V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID_ENABLE \ > + (V4L2_CID_MPEG_BASE + 541) > +#define V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOTHING_FLAG \ > + (V4L2_CID_MPEG_BASE + 542) > +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1 \ > + (V4L2_CID_MPEG_BASE + 543) > +#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK \ > + (V4L2_CID_MPEG_BASE + 544) > +#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH \ > + (V4L2_CID_MPEG_BASE + 545) > +#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC \ > + (V4L2_CID_MPEG_BASE + 546) > +#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY \ > + (V4L2_CID_MPEG_BASE + 547) > +#define V4L2_CID_MPEG_VIDEO_HEVC_DISABLE_INTRA_PU_SPLIT \ > + (V4L2_CID_MPEG_BASE + 548) > +#define V4L2_CID_MPEG_VIDEO_HEVC_DISABLE_TMV_PREDICTION \ > + (V4L2_CID_MPEG_BASE + 549) > +#define V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE_ENABLE \ > + (V4L2_CID_MPEG_BASE + 550) > +#define V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CR \ > + (V4L2_CID_MPEG_BASE + 551) > +#define V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CB \ > + (V4L2_CID_MPEG_BASE + 552) > +#define V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD \ > + (V4L2_CID_MPEG_BASE + 553) > +enum v4l2_cid_mpeg_video_hevc_size_of_length_field { > + V4L2_MPEG_VIDEO_HEVC_SIZE_0 = 0, > + V4L2_MPEG_VIDEO_HEVC_SIZE_1 = 1, > + V4L2_MPEG_VIDEO_HEVC_SIZE_2 = 2, > + V4L2_MPEG_VIDEO_HEVC_SIZE_4 = 3, > +}; > +#define V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR \ > + (V4L2_CID_MPEG_BASE + 554) > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH \ > + (V4L2_CID_MPEG_BASE + 555) > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT0 \ > + (V4L2_CID_MPEG_BASE + 556) > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT1 \ > + (V4L2_CID_MPEG_BASE + 557) > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT2 \ > + (V4L2_CID_MPEG_BASE + 558) > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT3 \ > + (V4L2_CID_MPEG_BASE + 559) > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT4 \ > + (V4L2_CID_MPEG_BASE + 560) > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT5 \ > + (V4L2_CID_MPEG_BASE + 561) > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT6 \ > + (V4L2_CID_MPEG_BASE + 562) > + > /* MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */ > #define V4L2_CID_MPEG_CX2341X_BASE (V4L2_CTRL_CLASS_MPEG | 0x1000) > #define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE (V4L2_CID_MPEG_CX2341X_BASE+0)