Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755449AbdCGOKG (ORCPT ); Tue, 7 Mar 2017 09:10:06 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:56262 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755266AbdCGOJ5 (ORCPT ); Tue, 7 Mar 2017 09:09:57 -0500 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 858B5605A0 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sboyd@codeaurora.org Date: Tue, 7 Mar 2017 06:00:35 -0800 From: Stephen Boyd To: Vivek Gautam Cc: Kishon Vijay Abraham I , Bjorn Andersson , robh+dt , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , Mark Rutland , Srinivas Kandagatla , linux-arm-msm@vger.kernel.org Subject: Re: [PATCH v4 3/4] dt-bindings: phy: Add support for QMP phy Message-ID: <20170307140035.GA10239@codeaurora.org> References: <587C88FE.2040900@ti.com> <50612693-5345-55da-8207-8c5e721fb68a@codeaurora.org> <20170118182223.GP10531@minitux> <20170119004028.GA4857@codeaurora.org> <5cee25c5-434b-6e73-301e-3942dedd16fa@codeaurora.org> <20170119214258.GD7829@codeaurora.org> <58871F6D.1090206@ti.com> <20170126234355.GF8801@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2963 Lines: 76 (Not sure I replied so here it is) On 01/27, Vivek Gautam wrote: > > > On 01/27/2017 05:13 AM, Stephen Boyd wrote: > >On 01/24, Vivek Gautam wrote: > > From "./Documentation/devicetree/bindings/graph.txt" - > "The device tree graph bindings described herein abstract more complex > devices that can have multiple specifiable ports, each of which can be > linked to one or more ports of other devices." > > So, this means we use 'port', 'ports' and 'endpoint' for devices whose one > or more ports is connected to other device's one or more ports. > > I can use 'lane' for the node name here. Ok. > > > > >> reg = <0x035000 0x130>, > >> <0x035200 0x200>, > >> <0x035400 0x1dc>; > >> #phy-cells = <0>; > >> > >> clocks = <&gcc GCC_PCIE_0_PIPE_CLK>; > >> clock-names = "pipe0"; > >> resets = <&gcc GCC_PCIE_0_PHY_BCR>; > >> reset-names = "lane0"; > >> }; > >> > >> pciephy_p1: port@1 { > >> reg = <0x036000 0x130>, > >> <0x036200 0x200>, > >> <0x036400 0x1dc>; > >> #phy-cells = <0>; > >> > >> clocks = <&gcc GCC_PCIE_1_PIPE_CLK>; > >> clock-names = "pipe1"; > >> resets = <&gcc GCC_PCIE_1_PHY_BCR>; > >> reset-names = "lane1"; > >> }; > >> > >> pciephy_p2: port@2 { > >> reg = <0x037000 0x130>, > >> <0x037200 0x200>, > >> <0x037400 0x1dc>; > >> #phy-cells = <0>; > >> > >> clocks = <&gcc GCC_PCIE_2_PIPE_CLK>; > >> clock-names = "pipe2"; > >> resets = <&gcc GCC_PCIE_2_PHY_BCR>; > >> reset-names = "lane2"; > >> }; > >> }; > >>-------------------- > >> > >>let me know if this looks okay. > >> > >> > >What's the plan for non-pcie qmp phy binding? In that case we > >don't have ports, so it gets folded into one node? > > > The non-pcie qmp phys still have one lane, that provides tx/rx. > > I am of the opinion that we don't have two different ways to create > phys in the driver, and keep one port/lane for such phys in dt. > Ok so we would still have a subnode in that case. Sounds ok. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project