Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933234AbdCGU3O (ORCPT ); Tue, 7 Mar 2017 15:29:14 -0500 Received: from hqemgate16.nvidia.com ([216.228.121.65]:15608 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751672AbdCGU3I (ORCPT ); Tue, 7 Mar 2017 15:29:08 -0500 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 07 Mar 2017 12:27:28 -0800 Subject: Re: [PATCH] clk: tegra: mark TEGRA210_CLK_DBGAPB as always on To: Geert Uytterhoeven , Peter De Schrijver References: <1488295191-24038-1-git-send-email-pdeschrijver@nvidia.com> <4cf40c25-2ce9-737c-9ccb-06bc2cdb61d7@nvidia.com> <20170306083835.GF26640@tbergstrom-lnx.Nvidia.com> <6d4dd315-cab6-189d-f383-fb7523fc31bd@nvidia.com> <20170306142850.GJ26640@tbergstrom-lnx.Nvidia.com> CC: Prashant Gaikwad , Michael Turquette , Stephen Boyd , "Stephen Warren" , Thierry Reding , Alexandre Courbot , linux-clk , , "linux-kernel@vger.kernel.org" From: Jon Hunter Message-ID: <598a2a7d-6e01-8884-e839-c758b731605a@nvidia.com> Date: Tue, 7 Mar 2017 20:27:23 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.7.0 MIME-Version: 1.0 In-Reply-To: X-Originating-IP: [10.26.11.41] X-ClientProxiedBy: UKMAIL102.nvidia.com (10.26.138.15) To UKMAIL101.nvidia.com (10.26.138.13) Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2294 Lines: 61 Hi Geert, On 06/03/17 15:53, Geert Uytterhoeven wrote: > Hi Peter, > > On Mon, Mar 6, 2017 at 3:28 PM, Peter De Schrijver > wrote: >> On Mon, Mar 06, 2017 at 09:58:29AM +0000, Jon Hunter wrote: >>> On 06/03/17 08:38, Peter De Schrijver wrote: >>>> On Thu, Mar 02, 2017 at 05:56:49PM +0000, Jon Hunter wrote: >>>>> On 28/02/17 15:19, Peter De Schrijver wrote: >>>>>> This is needed to make the JTAG debugging interface work. >>>>>> >>>>>> Signed-off-by: Peter De Schrijver >>>>>> --- >>>>>> drivers/clk/tegra/clk-tegra210.c | 1 + >>>>>> 1 file changed, 1 insertion(+) >>>>>> >>>>>> diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c >>>>>> index 9a2512a..708f5f1 100644 >>>>>> --- a/drivers/clk/tegra/clk-tegra210.c >>>>>> +++ b/drivers/clk/tegra/clk-tegra210.c >>>>>> @@ -2680,6 +2680,7 @@ static void tegra210_cpu_clock_resume(void) >>>>>> { TEGRA210_CLK_EMC, TEGRA210_CLK_CLK_MAX, 0, 1 }, >>>>>> { TEGRA210_CLK_MSELECT, TEGRA210_CLK_CLK_MAX, 0, 1 }, >>>>>> { TEGRA210_CLK_CSITE, TEGRA210_CLK_CLK_MAX, 0, 1 }, >>>>>> + { TEGRA210_CLK_DBGAPB, TEGRA210_CLK_CLK_MAX, 0, 1 }, >>>>>> { TEGRA210_CLK_TSENSOR, TEGRA210_CLK_CLK_M, 400000, 0 }, >>>>>> { TEGRA210_CLK_I2C1, TEGRA210_CLK_PLL_P, 0, 0 }, >>>>>> { TEGRA210_CLK_I2C2, TEGRA210_CLK_PLL_P, 0, 0 }, >>>>> >>>>> Should there be some dependency on say CONFIG_DEBUG_KERNEL? I am not >>>>> sure we always want this on for all cases. >>>> >>>> Why would you not want it to be always on? >>> >>> Purely for power reasons. I do not know how much power keeping this >> >> I don't expect it to be significant but I don't have any numbers. >> >>> clock running consumes, but I don't like the idea of clocks running all >>> the time when they are not needed. >> >> Problem is that in this case there is no easy way to determine if the clock >> needs to be on. > > I had a similar issue with SH-Mobile AG5, where the power domain containing > the JTAG interface is powered down. > > [DEBUG] ARM: dts: sh73a0: Add minimal device node for Coresight-ETM > https://patchwork.kernel.org/patch/8151511/ > > Want to debug? Apply patch. I know it's not ideal... Why don't you apply the patch and just keep the node disabled by default? Cheers Jon -- nvpublic