Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933806AbdCHHKv (ORCPT ); Wed, 8 Mar 2017 02:10:51 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:55992 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933176AbdCHHKp (ORCPT ); Wed, 8 Mar 2017 02:10:45 -0500 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org B513360132 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=vivek.gautam@codeaurora.org Subject: Re: [PATCH v4 3/4] dt-bindings: phy: Add support for QMP phy To: Stephen Boyd References: <587C88FE.2040900@ti.com> <50612693-5345-55da-8207-8c5e721fb68a@codeaurora.org> <20170118182223.GP10531@minitux> <20170119004028.GA4857@codeaurora.org> <5cee25c5-434b-6e73-301e-3942dedd16fa@codeaurora.org> <20170119214258.GD7829@codeaurora.org> <58871F6D.1090206@ti.com> <20170126234355.GF8801@codeaurora.org> <20170307140035.GA10239@codeaurora.org> Cc: Kishon Vijay Abraham I , Bjorn Andersson , robh+dt , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , Mark Rutland , Srinivas Kandagatla , linux-arm-msm@vger.kernel.org From: Vivek Gautam Message-ID: <88ee6e44-7a4a-deba-879f-9fbd89b9cac4@codeaurora.org> Date: Wed, 8 Mar 2017 12:15:03 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.2.0 MIME-Version: 1.0 In-Reply-To: <20170307140035.GA10239@codeaurora.org> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3076 Lines: 78 On 03/07/2017 07:30 PM, Stephen Boyd wrote: > (Not sure I replied so here it is) > > On 01/27, Vivek Gautam wrote: >> >> On 01/27/2017 05:13 AM, Stephen Boyd wrote: >>> On 01/24, Vivek Gautam wrote: >> From "./Documentation/devicetree/bindings/graph.txt" - >> "The device tree graph bindings described herein abstract more complex >> devices that can have multiple specifiable ports, each of which can be >> linked to one or more ports of other devices." >> >> So, this means we use 'port', 'ports' and 'endpoint' for devices whose one >> or more ports is connected to other device's one or more ports. >> >> I can use 'lane' for the node name here. > Ok. > >>>> reg = <0x035000 0x130>, >>>> <0x035200 0x200>, >>>> <0x035400 0x1dc>; >>>> #phy-cells = <0>; >>>> >>>> clocks = <&gcc GCC_PCIE_0_PIPE_CLK>; >>>> clock-names = "pipe0"; >>>> resets = <&gcc GCC_PCIE_0_PHY_BCR>; >>>> reset-names = "lane0"; >>>> }; >>>> >>>> pciephy_p1: port@1 { >>>> reg = <0x036000 0x130>, >>>> <0x036200 0x200>, >>>> <0x036400 0x1dc>; >>>> #phy-cells = <0>; >>>> >>>> clocks = <&gcc GCC_PCIE_1_PIPE_CLK>; >>>> clock-names = "pipe1"; >>>> resets = <&gcc GCC_PCIE_1_PHY_BCR>; >>>> reset-names = "lane1"; >>>> }; >>>> >>>> pciephy_p2: port@2 { >>>> reg = <0x037000 0x130>, >>>> <0x037200 0x200>, >>>> <0x037400 0x1dc>; >>>> #phy-cells = <0>; >>>> >>>> clocks = <&gcc GCC_PCIE_2_PIPE_CLK>; >>>> clock-names = "pipe2"; >>>> resets = <&gcc GCC_PCIE_2_PHY_BCR>; >>>> reset-names = "lane2"; >>>> }; >>>> }; >>>> -------------------- >>>> >>>> let me know if this looks okay. >>>> >>>> >>> What's the plan for non-pcie qmp phy binding? In that case we >>> don't have ports, so it gets folded into one node? >>> >> The non-pcie qmp phys still have one lane, that provides tx/rx. >> >> I am of the opinion that we don't have two different ways to create >> phys in the driver, and keep one port/lane for such phys in dt. >> > Ok so we would still have a subnode in that case. Sounds ok. Cool. Thanks Vivek -- The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project