Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932898AbdCISKj (ORCPT ); Thu, 9 Mar 2017 13:10:39 -0500 Received: from mail-it0-f68.google.com ([209.85.214.68]:34965 "EHLO mail-it0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932817AbdCISKf (ORCPT ); Thu, 9 Mar 2017 13:10:35 -0500 MIME-Version: 1.0 In-Reply-To: <58C19607.6000605@iogearbox.net> References: <20170301125426.l4nf65rx4wahohyl@wfg-t540p.sh.intel.com> <20170302202338.ci6wwb3yzjmdy4n2@wfg-t540p.sh.intel.com> <58B88353.2010508@iogearbox.net> <58C08535.3070000@iogearbox.net> <7af7bcc9-9115-be9f-2240-a022487e9b70@redhat.com> <58C152F1.9090004@iogearbox.net> <58C157E6.1010909@iogearbox.net> <58C19607.6000605@iogearbox.net> From: Linus Torvalds Date: Thu, 9 Mar 2017 10:10:33 -0800 X-Google-Sender-Auth: A1uJnznZF9KH4bS7anWMDeN_4vE Message-ID: Subject: Re: [net/bpf] 3051bf36c2 BUG: unable to handle kernel paging request at 0000a7cf To: Daniel Borkmann Cc: Thomas Gleixner , Kees Cook , Laura Abbott , Ingo Molnar , Peter Anvin , Fengguang Wu , Network Development , LKML , LKP , ast@fb.com, "the arch/x86 maintainers" , "David S. Miller" Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1131 Lines: 32 On Thu, Mar 9, 2017 at 9:51 AM, Daniel Borkmann wrote: > > What I see is that original cr4 is 0x610. The cpu_tlbstate.cr4 is > consistent to native_read_cr4() and since cr4 is != 0, it tells me > based on the comment in native_read_cr4() that cr4 seems to be > supported. Thus, meaning we end up with writing ... > > native_write_cr4(0x610); > native_write_cr4(0x610); > > ... twice, and this just doesn't trigger the desired TLB flush. Very odd. We should always have PGE (0x0080) set in cr4 (if the CPU supports it). But yes, if PGE is clear then that certainly explains the bug, and it's not an emulation issue. > I changed the code into the following ... > > cr4 = this_cpu_read(cpu_tlbstate.cr4); > /* clear PGE */ > - native_write_cr4(cr4 & ~X86_CR4_PGE); > + native_write_cr4(cr4 ^ X86_CR4_PGE); > /* write old PGE again and flush TLBs */ > native_write_cr4(cr4); Yeah, good for debugging, but not a good patch in general. The only valid reason for not having PGE enabled would be that the CPU doesn't support PGE at all. Linus