Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933401AbdCJLu6 (ORCPT ); Fri, 10 Mar 2017 06:50:58 -0500 Received: from shadbolt.e.decadent.org.uk ([88.96.1.126]:42417 "EHLO shadbolt.e.decadent.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932989AbdCJLux (ORCPT ); Fri, 10 Mar 2017 06:50:53 -0500 Content-Type: text/plain; charset="UTF-8" Content-Disposition: inline Content-Transfer-Encoding: 8bit MIME-Version: 1.0 From: Ben Hutchings To: linux-kernel@vger.kernel.org, stable@vger.kernel.org CC: akpm@linux-foundation.org, "Herbert Xu" , "Ard Biesheuvel" Date: Fri, 10 Mar 2017 11:46:22 +0000 Message-ID: X-Mailer: LinuxStableQueue (scripts by bwh) Subject: [PATCH 3.16 004/370] crypto: arm64/sha2-ce - fix for big endian In-Reply-To: X-SA-Exim-Connect-IP: 82.70.136.246 X-SA-Exim-Mail-From: ben@decadent.org.uk X-SA-Exim-Scanned: No (on shadbolt.decadent.org.uk); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1305 Lines: 41 3.16.42-rc1 review patch. If anyone has any objections, please let me know. ------------------ From: Ard Biesheuvel commit 174122c39c369ed924d2608fc0be0171997ce800 upstream. The SHA256 digest is an array of 8 32-bit quantities, so we should refer to them as such in order for this code to work correctly when built for big endian. So replace 16 byte scalar loads and stores with 4x32 vector ones where appropriate. Fixes: 6ba6c74dfc6b ("arm64/crypto: SHA-224/SHA-256 using ARMv8 Crypto Extensions") Signed-off-by: Ard Biesheuvel Signed-off-by: Herbert Xu [bwh: Backported to 3.16: use x2 instead of x0] Signed-off-by: Ben Hutchings --- arch/arm64/crypto/sha2-ce-core.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) --- a/arch/arm64/crypto/sha2-ce-core.S +++ b/arch/arm64/crypto/sha2-ce-core.S @@ -85,7 +85,7 @@ ENTRY(sha2_ce_transform) ld1 {v12.4s-v15.4s}, [x8] /* load state */ - ldp dga, dgb, [x2] + ld1 {dgav.4s, dgbv.4s}, [x2] /* load partial input (if supplied) */ cbz x3, 0f @@ -151,6 +151,6 @@ CPU_LE( rev32 v19.16b, v19.16b ) b 2b /* store new state */ -3: stp dga, dgb, [x2] +3: st1 {dgav.4s, dgbv.4s}, [x2] ret ENDPROC(sha2_ce_transform)