Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S937120AbdCJMXm (ORCPT ); Fri, 10 Mar 2017 07:23:42 -0500 Received: from bastet.se.axis.com ([195.60.68.11]:57826 "EHLO bastet.se.axis.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S935369AbdCJMXi (ORCPT ); Fri, 10 Mar 2017 07:23:38 -0500 Subject: Re: [RESEND PATCH v3 4/7] PCI: dwc: all: Modify dbi accessors to take dbi_base as argument To: Kishon Vijay Abraham I , Bjorn Helgaas , Joao Pinto , , , , References: <1489041545-15730-1-git-send-email-kishon@ti.com> <1489041545-15730-5-git-send-email-kishon@ti.com> <4e13580d-2625-5eed-bcbc-2ffd7493b073@axis.com> <595fab62-fb7a-888a-f898-7b59030585f1@axis.com> <58C28FCC.4070100@ti.com> CC: , Jingoo Han , Richard Zhu , Lucas Stach , Murali Karicheri , Thomas Petazzoni , Jesper Nilsson , Zhou Wang , Gabriele Paoloni From: Niklas Cassel Message-ID: <789eb88c-982e-9581-49a6-a337251bf781@axis.com> Date: Fri, 10 Mar 2017 13:23:23 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Icedove/45.6.0 MIME-Version: 1.0 In-Reply-To: <58C28FCC.4070100@ti.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-Originating-IP: [10.0.5.60] X-ClientProxiedBy: XBOX03.axis.com (10.0.5.17) To XBOX02.axis.com (10.0.5.16) X-TM-AS-GCONF: 00 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 975 Lines: 24 On 03/10/2017 12:36 PM, Kishon Vijay Abraham I wrote: > Hi, > > On Thursday 09 March 2017 08:35 PM, Niklas Cassel wrote: >> >> On 03/09/2017 03:48 PM, Niklas Cassel wrote: >>> On 03/09/2017 07:39 AM, Kishon Vijay Abraham I wrote: >>>> dwc has 2 dbi address space labeled dbics and dbics2. The existing >>>> helper to access dbi address space can access only dbics. However >>>> dbics2 has to be accessed for programming the BAR registers in the >>>> case of EP mode. This is in preparation for adding EP mode support >>>> to dwc driver. >>> Hello Kishon >>> >>> I don't really like the idea of adding an extra argument to every existing read/write. >>> Will not a read/write using dbi2 be quite uncommon compared to a read/write >>> using dbi? >>> >>> How about something like this: >>> >>> void __dw_pcie_writel(struct dw_pcie *pci, void __iomem *base, u32 reg, u32 val) >>> { >>> if (pci->ops->writel_dbi) >>> pci->ops->writel_dbi(pci, base, reg, val);x‘W¡R