Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S937993AbdCJOdD (ORCPT ); Fri, 10 Mar 2017 09:33:03 -0500 Received: from shadbolt.e.decadent.org.uk ([88.96.1.126]:42413 "EHLO shadbolt.e.decadent.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933653AbdCJLvD (ORCPT ); Fri, 10 Mar 2017 06:51:03 -0500 Content-Type: text/plain; charset="UTF-8" Content-Disposition: inline Content-Transfer-Encoding: 8bit MIME-Version: 1.0 From: Ben Hutchings To: linux-kernel@vger.kernel.org, stable@vger.kernel.org CC: akpm@linux-foundation.org, "Ard Biesheuvel" , "Herbert Xu" Date: Fri, 10 Mar 2017 11:46:22 +0000 Message-ID: X-Mailer: LinuxStableQueue (scripts by bwh) Subject: [PATCH 3.16 003/370] crypto: arm64/sha1-ce - fix for big endian In-Reply-To: X-SA-Exim-Connect-IP: 82.70.136.246 X-SA-Exim-Mail-From: ben@decadent.org.uk X-SA-Exim-Scanned: No (on shadbolt.decadent.org.uk); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1287 Lines: 42 3.16.42-rc1 review patch. If anyone has any objections, please let me know. ------------------ From: Ard Biesheuvel commit ee71e5f1e7d25543ee63a80451871f8985b8d431 upstream. The SHA1 digest is an array of 5 32-bit quantities, so we should refer to them as such in order for this code to work correctly when built for big endian. So replace 16 byte scalar loads and stores with 4x4 vector ones where appropriate. Fixes: 2c98833a42cd ("arm64/crypto: SHA-1 using ARMv8 Crypto Extensions") Signed-off-by: Ard Biesheuvel Signed-off-by: Herbert Xu [bwh: Backported to 3.16: use x2 instead of x0] Signed-off-by: Ben Hutchings --- arch/arm64/crypto/sha1-ce-core.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) --- a/arch/arm64/crypto/sha1-ce-core.S +++ b/arch/arm64/crypto/sha1-ce-core.S @@ -78,7 +78,7 @@ ENTRY(sha1_ce_transform) ld1r {k3.4s}, [x6] /* load state */ - ldr dga, [x2] + ld1 {dgav.4s}, [x2] ldr dgb, [x2, #16] /* load partial state (if supplied) */ @@ -147,7 +147,7 @@ CPU_LE( rev32 v11.16b, v11.16b ) b 2b /* store new state */ -3: str dga, [x2] +3: st1 {dgav.4s}, [x2] str dgb, [x2, #16] ret ENDPROC(sha1_ce_transform)