Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754446AbdCMRIV (ORCPT ); Mon, 13 Mar 2017 13:08:21 -0400 Received: from mail-vk0-f49.google.com ([209.85.213.49]:33743 "EHLO mail-vk0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754043AbdCMRIF (ORCPT ); Mon, 13 Mar 2017 13:08:05 -0400 MIME-Version: 1.0 In-Reply-To: <2d0ede95-86d6-4d52-6cf5-91de35a29145@cogentembedded.com> References: <1489422982-3461-1-git-send-email-bgolaszewski@baylibre.com> <1489422982-3461-2-git-send-email-bgolaszewski@baylibre.com> <2d0ede95-86d6-4d52-6cf5-91de35a29145@cogentembedded.com> From: Bartosz Golaszewski Date: Mon, 13 Mar 2017 18:08:03 +0100 Message-ID: Subject: Re: [PATCH 1/2] dt-bindings: ata: add DT bindings for ahci-dm816 SATA controller To: Sergei Shtylyov Cc: Tejun Heo , Rob Herring , Mark Rutland , Neil Armstrong , Michael Turquette , Kevin Hilman , Patrick Titiano , linux-ide@vger.kernel.org, linux-devicetree , LKML Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2035 Lines: 65 2017-03-13 17:53 GMT+01:00 Sergei Shtylyov : > Hello! > > On 03/13/2017 07:36 PM, Bartosz Golaszewski wrote: > >> Add DT bindings for the onboard SATA controller present on the DM816x >> SoCs. >> >> Signed-off-by: Bartosz Golaszewski >> --- >> Documentation/devicetree/bindings/ata/ahci-dm816.txt | 20 >> ++++++++++++++++++++ >> 1 file changed, 20 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/ata/ahci-dm816.txt >> >> diff --git a/Documentation/devicetree/bindings/ata/ahci-dm816.txt >> b/Documentation/devicetree/bindings/ata/ahci-dm816.txt >> new file mode 100644 >> index 0000000..b87ed5a >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/ata/ahci-dm816.txt >> @@ -0,0 +1,20 @@ >> +Device tree binding for the TI DM816 AHCI SATA Controller >> +--------------------------------------------------------- >> + >> +Required properties: >> + - compatible: must be "ti,dm816-ahci" >> + - reg: physical base address and size of the register region used by >> + the controller (as defined by the AHCI 1.1 standard) >> + - interrupts: interrupt specifier (refer to the interrupt binding) >> + - clocks: clock specifiers (refer to the clock binding); two clocks > > > There should be a phandle preceding the clock specifier, all new such > props are different to the old "interrupts" (which had phandle in a separate > "interrupt-parent" prop). > I'm afraid I don't understand - could you point me to an example? >> + must be specified: the functional clock and an external >> + reference clock >> + >> +Example: >> + >> + sata: sata@4a140000 { >> + compatible = "ti,dm816-ahci"; >> + reg = <0x4a140000 0xffff>; > > > I think you meant 0x10000 ISO 0xffff -- this is a size, not limit. > Right, thanks. >> + interrupts = <16>; >> + clocks = <&sysclk5_ck>, <&sata_refclk>; >> + }; >> > > MBR, Sergei > Thanks, Bartosz Golaszewski