Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754207AbdCMVew (ORCPT ); Mon, 13 Mar 2017 17:34:52 -0400 Received: from mail-pg0-f53.google.com ([74.125.83.53]:35250 "EHLO mail-pg0-f53.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752996AbdCMVen (ORCPT ); Mon, 13 Mar 2017 17:34:43 -0400 From: Kevin Hilman To: Bartosz Golaszewski Cc: Rob Herring , Mark Rutland , Neil Armstrong , Michael Turquette , Patrick Titiano , Tony Lindgren , Paul Walmsley , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org Subject: Re: [PATCH 1/4] ARM: OMAP2+: dm81xx: Add clkdm and hwmod for SATA Organization: BayLibre References: <1489423399-3824-1-git-send-email-bgolaszewski@baylibre.com> <1489423399-3824-2-git-send-email-bgolaszewski@baylibre.com> Date: Mon, 13 Mar 2017 14:34:40 -0700 In-Reply-To: <1489423399-3824-2-git-send-email-bgolaszewski@baylibre.com> (Bartosz Golaszewski's message of "Mon, 13 Mar 2017 17:43:16 +0100") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.1 (darwin) MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2225 Lines: 68 Bartosz Golaszewski writes: > From: Kevin Hilman > > Add the SATA clockdomain (part of CM_DEFAULT) and a hwmod for the SATA > block on dm81xx. > > Tested on DM8168 EVM. > > Signed-off-by: Kevin Hilman > Signed-off-by: Bartosz Golaszewski > --- > arch/arm/mach-omap2/clockdomains81xx_data.c | 10 +++++++++ > arch/arm/mach-omap2/cm81xx.h | 2 ++ > arch/arm/mach-omap2/omap_hwmod_81xx_data.c | 34 +++++++++++++++++++++++++++++ > 3 files changed, 46 insertions(+) > > diff --git a/arch/arm/mach-omap2/clockdomains81xx_data.c b/arch/arm/mach-omap2/clockdomains81xx_data.c > index 3b5fb05..65fbd13 100644 > --- a/arch/arm/mach-omap2/clockdomains81xx_data.c > +++ b/arch/arm/mach-omap2/clockdomains81xx_data.c > @@ -91,6 +91,14 @@ static struct clockdomain default_l3_slow_81xx_clkdm = { > .flags = CLKDM_CAN_SWSUP, > }; > > +static struct clockdomain default_sata_81xx_clkdm = { > + .name = "default_clkdm", > + .pwrdm = { .name = "default_pwrdm" }, > + .cm_inst = TI81XX_CM_DEFAULT_MOD, > + .clkdm_offs = TI816X_CM_DEFAULT_SATA_CLKDM, > + .flags = CLKDM_CAN_SWSUP, > +}; > + > /* 816x only */ > > static struct clockdomain alwon_mpu_816x_clkdm = { > @@ -173,6 +181,7 @@ static struct clockdomain *clockdomains_ti814x[] __initdata = { > &mmu_81xx_clkdm, > &mmu_cfg_81xx_clkdm, > &default_l3_slow_81xx_clkdm, > + &default_sata_81xx_clkdm, > NULL, > }; > > @@ -200,6 +209,7 @@ static struct clockdomain *clockdomains_ti816x[] __initdata = { > &default_ducati_816x_clkdm, > &default_pci_816x_clkdm, > &default_l3_slow_81xx_clkdm, > + &default_sata_81xx_clkdm, > NULL, > }; > > diff --git a/arch/arm/mach-omap2/cm81xx.h b/arch/arm/mach-omap2/cm81xx.h > index 3a0ccf0..44ca275 100644 > --- a/arch/arm/mach-omap2/cm81xx.h > +++ b/arch/arm/mach-omap2/cm81xx.h > @@ -35,6 +35,7 @@ > #define TI81XX_CM_MMU_CLKDM 0x000C > #define TI81XX_CM_MMUCFG_CLKDM 0x0010 > #define TI81XX_CM_ALWON_MPU_CLKDM 0x001C > +#define TI81XX_CM_ALWON_SYSCLK5_CLKDM 0x0024 oops, this is a stray addition (by me) but is no not needed. > #define TI81XX_CM_ALWON_L3_FAST_CLKDM 0x0030 > Kevin