Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750842AbdCNGw1 (ORCPT ); Tue, 14 Mar 2017 02:52:27 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:10049 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1750726AbdCNGwZ (ORCPT ); Tue, 14 Mar 2017 02:52:25 -0400 Message-ID: <1489474323.1870.47.camel@mtkswgap22> Subject: Re: [PATCH net-next 1/4] dt-bindings: net: dsa: add Mediatek MT7530 binding From: Sean Wang To: Florian Fainelli CC: , , , , , , , , , , , , Date: Tue, 14 Mar 2017 14:52:03 +0800 In-Reply-To: <928d1178-e04a-3e78-4a7a-36127321a949@gmail.com> References: <1489421488-300-1-git-send-email-sean.wang@mediatek.com> <1489421488-300-2-git-send-email-sean.wang@mediatek.com> <928d1178-e04a-3e78-4a7a-36127321a949@gmail.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.3-0ubuntu6 Content-Transfer-Encoding: 7bit MIME-Version: 1.0 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2417 Lines: 68 On Mon, 2017-03-13 at 09:47 -0700, Florian Fainelli wrote: > On 03/13/2017 09:11 AM, sean.wang@mediatek.com wrote: > > From: Sean Wang > > > > Add device-tree binding for Mediatek MT7530 switch. > > > > Cc: devicetree@vger.kernel.org > > Signed-off-by: Sean Wang > > --- > > .../devicetree/bindings/net/dsa/mt7530.txt | 94 ++++++++++++++++++++++ > > 1 file changed, 94 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/net/dsa/mt7530.txt > > > > diff --git a/Documentation/devicetree/bindings/net/dsa/mt7530.txt b/Documentation/devicetree/bindings/net/dsa/mt7530.txt > > new file mode 100644 > > index 0000000..0e50dbf > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/net/dsa/mt7530.txt > > @@ -0,0 +1,94 @@ > > +Mediatek MT7530 Ethernet switch > > +================================ > > + > > +Required properties: > > + > > +- compatible: Must be compatible = "mediatek,mt7530"; > > +- #address-cells: Must be 1 > > +- #size-cells: Must be 0 > > +- mediatek,ethsys: Phandle to the syscon node that handles the reset. > > +- mediatek,ethernet: Phandle to the syscon node that Mediatek ethernet driver > > + provides that handles the TRGMII setup used by the switch. > > + See > > + Documentation/devicetree/bindings/net/mediatek-net.txt for the detailed > > + setup on mediatek ethernet. > > This seems redundant with the CPU port's ethernet phandle here. Okay, it is indeed better to reuse the phandle embedded in the cpu ports. I will reuse this in the next one. By the ways, I have a question which is could current DSA framework allows managing the fabric designated from "multiple cpu ports" to "user ports" in any combination in brctl and in other existing commands? For example. I assume that there are two cpu port called 5, and 6.and there are five user ports called 0, 1, 2 and 3. and the default fabric on the switch is mapping from { 5 } <-> { 0, 1, 2, 3 ,4 } where members in the braces I assumes they also can communicate with each other. Is it feasible for changing the fabric into other combinations in the runtime such as {5} <-> {0, 1, 2, 3} and {6} <-> {4} {5} <-> {0, 1, 2} and {6} <-> {3, 4} or {6} <-> {0, 1} and {6} <-> {2, 3, 4} or .... {6} <-> {0, 1, 2, 3 ,4} ? After some trace code, I found it seemed that only one cpu port could be supported via one dsa registration. Sean