Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750851AbdCNHDy (ORCPT ); Tue, 14 Mar 2017 03:03:54 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:27567 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1750760AbdCNHDw (ORCPT ); Tue, 14 Mar 2017 03:03:52 -0400 Message-ID: <1489475016.1870.49.camel@mtkswgap22> Subject: Re: [PATCH net-next 4/4] net-next: dsa: add dsa support for Mediatek MT7530 switch From: Sean Wang To: Andrew Lunn CC: , , , , , , , , , , , , Date: Tue, 14 Mar 2017 15:03:36 +0800 In-Reply-To: <20170313231117.GF14183@lunn.ch> References: <1489421488-300-1-git-send-email-sean.wang@mediatek.com> <1489421488-300-5-git-send-email-sean.wang@mediatek.com> <20170313231117.GF14183@lunn.ch> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.3-0ubuntu6 Content-Transfer-Encoding: 7bit MIME-Version: 1.0 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1163 Lines: 41 On Tue, 2017-03-14 at 00:11 +0100, Andrew Lunn wrote: > > +static int > > +mt7530_setup(struct dsa_switch *ds) > > +{ > > + struct mt7530_priv *priv = ds->priv; > > + int ret, i, phy_mode; > > + u8 cpup_mask = 0; > > + u32 id, val; > > + struct regmap *regmap; > > + > > + /* Make sure that cpu port specfied on the dt is appropriate */ > > + if (!dsa_is_cpu_port(ds, MT7530_CPU_PORT)) { > > + dev_err(priv->dev, "port not matched with the CPU port\n"); > > + return -EINVAL; > > + } > > + > > + regmap = devm_regmap_init(ds->dev, NULL, priv, > > + &mt7530_regmap_config); > > + if (IS_ERR(regmap)) > > + dev_warn(priv->dev, "phy regmap initialization failed"); > > + > > + phy_mode = of_get_phy_mode(ds->ports[ds->dst->cpu_port].dn); > > + if (phy_mode < 0) { > > + dev_err(priv->dev, "Can't find phy-mode for master device\n"); > > + return phy_mode; > > + } > > + dev_info(priv->dev, "phy-mode for master device = %x\n", phy_mode); > > Hi Sean > > It is not documented in the binding that a phy-mode is mandatory for > the cpu port. > > Andrew Hi Andrew, thanks for your reviewing. I'll also add the missing part into the next one. Sean