Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750861AbdCNJGd (ORCPT ); Tue, 14 Mar 2017 05:06:33 -0400 Received: from mail-wr0-f176.google.com ([209.85.128.176]:34926 "EHLO mail-wr0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750771AbdCNJGa (ORCPT ); Tue, 14 Mar 2017 05:06:30 -0400 Subject: Re: [PATCH 1/2] dt-bindings: ata: add DT bindings for ahci-dm816 SATA controller To: Sergei Shtylyov , Bartosz Golaszewski References: <1489422982-3461-1-git-send-email-bgolaszewski@baylibre.com> <1489422982-3461-2-git-send-email-bgolaszewski@baylibre.com> <2d0ede95-86d6-4d52-6cf5-91de35a29145@cogentembedded.com> <61ee23f2-734b-f793-0054-364ce553ae5e@cogentembedded.com> Cc: Tejun Heo , Rob Herring , Mark Rutland , Michael Turquette , Kevin Hilman , Patrick Titiano , linux-ide@vger.kernel.org, linux-devicetree , LKML From: Neil Armstrong Organization: Baylibre Message-ID: Date: Tue, 14 Mar 2017 10:06:19 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.7.0 MIME-Version: 1.0 In-Reply-To: <61ee23f2-734b-f793-0054-364ce553ae5e@cogentembedded.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2705 Lines: 73 On 03/13/2017 06:27 PM, Sergei Shtylyov wrote: > On 03/13/2017 08:08 PM, Bartosz Golaszewski wrote: > >>>> Add DT bindings for the onboard SATA controller present on the DM816x >>>> SoCs. >>>> >>>> Signed-off-by: Bartosz Golaszewski >>>> --- >>>> Documentation/devicetree/bindings/ata/ahci-dm816.txt | 20 >>>> ++++++++++++++++++++ >>>> 1 file changed, 20 insertions(+) >>>> create mode 100644 Documentation/devicetree/bindings/ata/ahci-dm816.txt >>>> >>>> diff --git a/Documentation/devicetree/bindings/ata/ahci-dm816.txt >>>> b/Documentation/devicetree/bindings/ata/ahci-dm816.txt >>>> new file mode 100644 >>>> index 0000000..b87ed5a >>>> --- /dev/null >>>> +++ b/Documentation/devicetree/bindings/ata/ahci-dm816.txt >>>> @@ -0,0 +1,20 @@ >>>> +Device tree binding for the TI DM816 AHCI SATA Controller >>>> +--------------------------------------------------------- >>>> + >>>> +Required properties: >>>> + - compatible: must be "ti,dm816-ahci" >>>> + - reg: physical base address and size of the register region used by >>>> + the controller (as defined by the AHCI 1.1 standard) >>>> + - interrupts: interrupt specifier (refer to the interrupt binding) >>>> + - clocks: clock specifiers (refer to the clock binding); two clocks >>> >>> >>> There should be a phandle preceding the clock specifier, all new such >>> props are different to the old "interrupts" (which had phandle in a separate >>> "interrupt-parent" prop). > >> I'm afraid I don't understand - could you point me to an example? > > Have you read Documentation/devicetree/bindings/clock/clock-bindings.txt, on clock consumers? > In fact, your own example below doesn't have clock specifiers, only phandles. Hi Sergei, I think it's perfectly clear since he mentions the "clock bindings", so it's clear the clocks property must conform to the bindings described in the clock/clock-bindings.txt file. The term "specifier" is alone not very clear, but it used as is in plenty of other bindings files about this clocks property (i.e imx-sata.txt, ahci-fsl-qoriq.txt, ahci-ceva.txt). And it's perfectly allowed to only have a single phandle without any arguments, as described in the clock bindings actually. Thanks, Neil > >>>> + must be specified: the functional clock and an external >>>> + reference clock >>>> + >>>> +Example: >>>> + >>>> + sata: sata@4a140000 { >>>> + compatible = "ti,dm816-ahci"; >>>> + reg = <0x4a140000 0xffff>; > [...] >>>> + interrupts = <16>; >>>> + clocks = <&sysclk5_ck>, <&sata_refclk>; >>>> + }; >>>> > >> Thanks, >> Bartosz Golaszewski > > MBR, Sergei >