Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750927AbdCNKnv (ORCPT ); Tue, 14 Mar 2017 06:43:51 -0400 Received: from mail-vk0-f43.google.com ([209.85.213.43]:34187 "EHLO mail-vk0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750749AbdCNKnt (ORCPT ); Tue, 14 Mar 2017 06:43:49 -0400 MIME-Version: 1.0 In-Reply-To: <61ee23f2-734b-f793-0054-364ce553ae5e@cogentembedded.com> References: <1489422982-3461-1-git-send-email-bgolaszewski@baylibre.com> <1489422982-3461-2-git-send-email-bgolaszewski@baylibre.com> <2d0ede95-86d6-4d52-6cf5-91de35a29145@cogentembedded.com> <61ee23f2-734b-f793-0054-364ce553ae5e@cogentembedded.com> From: Bartosz Golaszewski Date: Tue, 14 Mar 2017 11:43:47 +0100 Message-ID: Subject: Re: [PATCH 1/2] dt-bindings: ata: add DT bindings for ahci-dm816 SATA controller To: Sergei Shtylyov Cc: Tejun Heo , Rob Herring , Mark Rutland , Neil Armstrong , Michael Turquette , Kevin Hilman , Patrick Titiano , linux-ide@vger.kernel.org, linux-devicetree , LKML Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2290 Lines: 61 2017-03-13 18:27 GMT+01:00 Sergei Shtylyov : > On 03/13/2017 08:08 PM, Bartosz Golaszewski wrote: > >>>> Add DT bindings for the onboard SATA controller present on the DM816x >>>> SoCs. >>>> >>>> Signed-off-by: Bartosz Golaszewski >>>> --- >>>> Documentation/devicetree/bindings/ata/ahci-dm816.txt | 20 >>>> ++++++++++++++++++++ >>>> 1 file changed, 20 insertions(+) >>>> create mode 100644 Documentation/devicetree/bindings/ata/ahci-dm816.txt >>>> >>>> diff --git a/Documentation/devicetree/bindings/ata/ahci-dm816.txt >>>> b/Documentation/devicetree/bindings/ata/ahci-dm816.txt >>>> new file mode 100644 >>>> index 0000000..b87ed5a >>>> --- /dev/null >>>> +++ b/Documentation/devicetree/bindings/ata/ahci-dm816.txt >>>> @@ -0,0 +1,20 @@ >>>> +Device tree binding for the TI DM816 AHCI SATA Controller >>>> +--------------------------------------------------------- >>>> + >>>> +Required properties: >>>> + - compatible: must be "ti,dm816-ahci" >>>> + - reg: physical base address and size of the register region used by >>>> + the controller (as defined by the AHCI 1.1 standard) >>>> + - interrupts: interrupt specifier (refer to the interrupt binding) >>>> + - clocks: clock specifiers (refer to the clock binding); two clocks >>> >>> >>> >>> There should be a phandle preceding the clock specifier, all new such >>> props are different to the old "interrupts" (which had phandle in a >>> separate >>> "interrupt-parent" prop). > > >> I'm afraid I don't understand - could you point me to an example? > > > Have you read Documentation/devicetree/bindings/clock/clock-bindings.txt, > on clock consumers? Yes I have. It says: 66 clocks: List of phandle and clock specifier pairs, one pair 67 for each clock input to the device. Note: if the 68 clock provider specifies '0' for #clock-cells, then 69 only the phandle portion of the pair will appear. > In fact, your own example below doesn't have clock specifiers, only > phandles. > Since the SATA reference clock specifies 0 for #clock-cells I'll omit the clock specifier. On the other hand: I'll rephrase the clocks property description in the bindings for clarity. Thanks, Bartosz