Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752952AbdCNPDO (ORCPT ); Tue, 14 Mar 2017 11:03:14 -0400 Received: from mail-ua0-f174.google.com ([209.85.217.174]:35189 "EHLO mail-ua0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752695AbdCNPBt (ORCPT ); Tue, 14 Mar 2017 11:01:49 -0400 MIME-Version: 1.0 In-Reply-To: <20170313213405.GX20572@atomide.com> References: <1489423399-3824-1-git-send-email-bgolaszewski@baylibre.com> <1489423399-3824-3-git-send-email-bgolaszewski@baylibre.com> <20170313213405.GX20572@atomide.com> From: Bartosz Golaszewski Date: Tue, 14 Mar 2017 16:01:47 +0100 Message-ID: Subject: Re: [PATCH 2/4] ARM: dts: dm8168-evm: add the external reference clock for SATA To: Tony Lindgren Cc: Rob Herring , Mark Rutland , Neil Armstrong , Michael Turquette , Kevin Hilman , Patrick Titiano , Paul Walmsley , linux-ide@vger.kernel.org, linux-devicetree , LKML , arm-soc , linux-omap@vger.kernel.org Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 655 Lines: 23 2017-03-13 22:34 GMT+01:00 Tony Lindgren : > * Bartosz Golaszewski [170313 09:45]: >> This board has an external oscillator supplying the reference clock >> signal for SATA. Its rate is fixed at 100Mhz. Add a corresponding >> device tree node. > > Is this the 100MHz clock from PCIe? Just like on dm814x-evm as noted > in the workaround thread below: > > http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/p/181083/671141 > > Regards, > > Tony > Hi Tony, these signals come from a TI CDCM61002 (U30 on the board's schematics). It's hardwired to 100mHZ output. Thanks, Bartosz Golaszewski